EDA
Electronic Design Automation (EDA) tools span the entire design chain for electronics products. Automation starts with technology computer-aided automation (TCAD) tools, which engineers use to model the fabrication processes that determine device physical behavior. Modeling engineers conve... Morert that behavior to simulation models, which designers then use to analyze their circuits, from individual transistors and analog circuits to logic gates, to complex digital blocks and complete integrated circuits (ICs) and systems. Physical implementation tools are used to layout chips, packages and printed-circuit boards (PCBs) for manufacturing. Verification tools are critical for engineers to test their designs for correct functional operation, including the effects of environmental factors such as variations in temperature, voltage and manufacturing tolerances.
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MathWorks Introduces HDL Coder and Verifier For MATLAB
Posted 2 months ago — By Mike Demler, Editorial Director -
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White Paper: Reducing Switching Power with Intelligent Clock Gating
3 months ago — Frederic Rivoallon, Xilinx, Inc.Xilinx delivers the first automated, fine-grain clock-gating solution that can reduce dynamic power by up to 30% in Virtex(r)-6, Spartan(r)-6, Kintex(tm)-7, and Virtex-7 FPGA designs. Xilinx intelligent clock-gating optimizations are automatically performed on the entire design, introduce no new tools or steps to the flow, and generate no changes to the existing logic or to the clocks that alter the behavior of the design. And, in most cases, the timing is also preserved.
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Use Transaction-Level Models to ensure hardware and software are in sync
5 months ago — Michael McNamara, Cadence Design SystemsSystemC-based Transaction-Level Models (TLMs) ease communication and synchronization between software and hardware design teams.
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Approaches and tools for FPGA mixed-signal integration
5 months ago — Allan Chin, StellamarMultiple methods for integrating ADCs into FPGAs are available, but the right implementation is contingent upon the signal being measured.
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Synopsys speeds up protocol verification for SOC communication interfaces
Posted 2 months ago — By EDA TechChannel -
EDA Consortium Annual CEO Forecast and Industry Vision February 29, 2012, Santa…
Posted 3 months ago — By EDA TechChannel - Newer Blog Posts Older Blog Posts
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EDA chatter
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What’s Hot at DAC 2011
Video — DACPavilion -
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Video: Software Design in Medical Devices – Solving the Quality and Compliance Challenge
Video — Ryan Lloyd, Product Manager, MKS (ALM) -
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Video: Accelerating Software Innovation
Video — Video, MKS (ALM) -
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Video: Reducing Manual Effort for Risk Management Compliance
Video — Staff at MKS, a PTC Company, MKS (ALM) - Newer Videos Older Videos
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http://www.eedailynews.com/2012/01/magma-details-shotgun-marriage-to.html
Posted 4 months ago — By EDA TechChannel -
EDA TechChannel’s Facebook Wall 2011-12-02 17:33:18
Posted 5 months ago — By EDA TechChannel -
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Virtual or real: Prototyping platform(s) for ARM-based FPGA design
5 months ago — Mike Demler, Editorial DirectorSoC FPGAs offer both hardware and software approaches to platform prototyping, each of which confronts different challenges of the hardware-software codesign process.
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New developments in DSP design
5 months ago — Michael Parker, Altera CorporationAdvances in DSP development tools and chips that support both fixed- and floating-point circuitries help forge high-level design flows for FPGAs.
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EDA News
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IEEE Council on EDA Presents Talk on Digital Analog Design by Stanford’s Mark Horowitz During DAC
Last week -
IEEE’s Council on EDA to Recognize Outstanding Achievement in EDA During DAC
2 weeks ago -
VHDL/Verilog Converters upgraded for Verilog 2005
2 weeks ago -
Oasys Design Systems Closes Series B Funding With Investments From Intel Capital, Xilinx
5 weeks ago -
Impulse Announces C-to-FPGA Support for Arista Networks 7124FX AppSwitch
5 weeks ago -
Carbon and Arteris Partner to Deliver Interconnect Models to SoC Designers
2 months ago -
Media Alert: Forte Design Systems to Demonstrate SystemC High-Level Synthesis at DATE 2012
2 months ago -
MathWorks Introduces HDL Coder and Verifier For MATLAB
2 months ago -
Breker Verification Systems to Exhibit and Sponsor Panel at DVCon 2012
2 months ago -
DVCon 2012 – Don’t Miss It
2 months ago
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