Montpellier, France, 24th May 2013. Cortus, a technology leader in cost effective, silicon efficient, 32-bit processor IP, announces that they are appointing Dr Richard Ryu as Technical Director, Korea with immediate effect.

Dr Ryu, a graduate of Pohang University of Science and Technology (POSTECH), brings over twenty years of industry experience. He has previously worked on embedded software, network security platforms and ASIC development at companies including LG Electronics, LG Nsys and LG CNS.

“We are very happy to welcome Dr Richard Ryu to the Cortus team”, says Michael Chapman, CEO and President of Cortus, “His proven industry experience will greatly benefit our growing customer base in Korea”.

“Over the last two years I have seen how Cortus processor IP has been providing a low power, silicon efficient solution for smart applications such as smart cards, user interface, sensors and wireless”, says Richard Ryu. “I am looking forward to working with Cortus to expand in the Korean semiconductor market”.

The Cortus family of APS processors starts with the world’s smallest 32-bit core, the APS1, and goes up to the floating point FPS6. All cores interface to Cortus’ peripherals including Ethernet 10/100 MAC, USB 2.0 Device and USB 2.0 OTG via the efficient APS bus. They also share the simple vectored interrupt structure which ensures rapid, real time interrupt response, with low software overhead.

The APS toolchain and IDE (for C and C++) is available to licensees free of charge, and which can be customised and branded for final customer use. Ports of various RTOSs are available such as FreeRTOS, Micrium uC/OSII and uCLinux.

To date approximately 500 million devices have been manufactured containing Cortus processor cores.

About Cortus S.A.:

Cortus S.A. is the cost/performance leader for 32 bit processor IP for systems on chip (SoC). Cortus uses a modern RISC architecture optimised for the new wave of low power, intelligent applications including the Internet of Things (IoT). The Cortus processor family comprises the entry level APS1, the energy efficient APS3R, the high performance APS5 and the floating point FPS6. Integrated circuits containing Cortus cores have been manufactured in high volumes for a wide range of applications including automotive, imaging, M2M controllers, secure microcontrollers, sensors, SIM cards, smart metering and wireless

www.cortus.com

ProximusDA has developed a technology to enable the distribution and execution of complex distributed applications over multi-core CPUs and GPUs. The foundation of this technology relies on a formal and explicit system-level communication modeling at the transaction level throughout the complete system. ProximusRealizer, a ProximusDA product announced last year at DAC in San Francisco, leverages its distributed execution kernel to support critical SOC design tasks:

 Capturing and executing SOC functional specifications (HW independent system level specs).

 System level hardware & software architecture explorations and specifications.

 Embedded software development, mapping and distributed execution & profiling.

 System-level HW verification and SW validation.

ProximusRealizer builds high-performance distributed software virtual prototypes (SVP) by leveraging multi-cpu/multi-core hardware available in today’s off-the-shelf servers. It enables HW & SW architects to explore multiple HW/SW trade-offs in a fraction of time that it would take with a traditional SystemC (OSCI) TLM and earlier than with FPGA approaches.

“Our collaboration with ST demonstrates the beneficial synergy between ProximusDA and its customers. By combining ProximusDA’s expertise in parallel and distributed software application with ST’s deep expertise in SOC advanced distributed-computing architecture and its undisputed SystemC TLM leadership, we are able to deliver solutions that uniquely address the requirement and complexity of upcoming SOC products. The first achievement of the collaboration has been to allow ST to build distributed execution runtime of its SystemC TLM platforms on machines with up to 64 cores, said Enno Wein, CEO of ProximusDA.

The next generation of System-on-a-Chip (SOC) requires critical attention to the development of the embedded software due to the intrinsic nature of the distributed computing architecture. At the same time, the design of heterogeneous multi-core architectures is demanding massive computing resources to fuel software virtual prototypes.

“ST has a strong focus on the embedded processing segment as the heart of electronics systems, so we wanted to move our TLM virtual prototyping to the next level of performance in order to stay ahead of the competition, said Laurent Ducousso, Virtual Platform Manager, Unified Platform Division R & D, Digital Convergence Group, STMicroelectronics. “Working with ProximusDA leverages our in-depth SystemC TLM investment and enables accelerated execution speed. With excellent performance results, we are currently integrating ProximusDA technologies into our TLM environment.”

Availability and Compatibility : ProximusRealizer is currently available in production.

About ProximusDA :

ProximusDA GmbH is headquartered in Munich, Germany, and has a wholly owned subsidiary in Yerevan, the capital of Armenia. Research, product definition, marketing, business development and sales as well as overall administration are located in the German headquarter. ProximusDA is a spin-off from Instigate CJSC, headquartered in Yerevan, Armenia based on technology developed by Instigate since 2005. The technology is based on about 200 man years of experience in the design of massive parallel systems at Instigate since 2005

For more information, please contact :

Philippe Metsu (philippe@proximusda.com +33 (0) 625 574 222)

ProximusDA will exhibit at DAC 2013 in Austin, Texas, on June 3-5 , booth #1341

WILSONVILLE, Ore., May 22, 2013—Mentor Graphics Corp. (NASDAQ: MENT), a leader in electronic design automation, today announced it has teamed with OpSIS and Lumerical Solutions to develop a complete EDA-style, full flow process design kit (PDK) for the OpSIS IME (Institute of Microelectronics) silicon photonics process. The prospect of integrating a silicon photonics process with silicon-based electronics would allow adding the driver and control electronics on the same chip, greatly reducing packaging complexity and cost. Adding a photonic layer and interconnects also holds the promise of solving speed bottlenecks in future computing and chip platforms.

After almost of year of development and testing by the combined team of OpSIS, Mentor and Lumerical, the OpSIS team has demonstrated a prototype full design implementation and verification flow for the IME silicon photonics process. This flow uses the Mentor® Pyxis® custom IC design platform for schematic capture and schematic driven layout, along with the Mentor Calibre® nmDRC™ and Calibre nmLVS™ tools with detailed parameter checking for physical verification of the design. This prototype flow is available for use by design teams who participate in an OpSIS MultiProject Wafer design workshop.

“We are extremely pleased with the industry collaboration and support OpSIS had received in developing a PDK for use by silicon photonics designers,” said Michael Hochberg, co-founder and director, OpSIS. “By working together, we are making silicon photonics a reality for multiple applications, research efforts, and companies that would not be able to do such work independently.”

The OpSIS PDK also relies on technology from Lumerical Solutions for optical simulation that is set up to let users create and manage Lumerical INTERCONNECT projects inside the Pyxis environment. Lumerical INTERCONNECT is used to provide system level optical analysis of integrated silicon photonics circuits. Compact model development work is ongoing using Lumerical’s FDTD Solutions, MODE Solutions and DEVICE to complement the experimental data.

“The simulation of photonic circuits inside an EDA-style flow is extremely challenging so we are excited to reach the critical step of exporting a circuit to INTERCONNECT for simulation,” said James Pond, PhD, chief technology officer, Lumerical Solutions. “We look forward to collaborating with our partners and also the end users to ensure that this design and simulation flow meets their needs in the future.”

Within the Pyxis custom IC design platform, the OpSIS PDK currently supports call-back driven photonic PCells that can be quickly assembled using connectivity-driven waveguide routing with radial and adiabatic bends, as well as S-bend support. Design rule checking is done with the Calibre nmDRC tool using out-of-the-box SVRF rules with special considerations for silicon photonic structures, along with the Calibre nmLVS tool for device checking that is similar to other high-volume design flows used in the industry. Tiling and mask preparation is done using Calibre SmartFill in conjunction with the Calibre DESIGNRev™ tool. Mentor has also partnered with OpSIS to ensure access to design tools so this does not become a barrier to the development of silicon photonics test chips.

“Silicon photonics is becoming an important design enabler, especially for data communications. As this technology finds its way into more and more chips, it is extremely important that traditional EDA providers partner with the companies providing dedicated photonics tools and with foundries supporting silicon photonics. We are very pleased to be part of this collaboration,” said Linda Fosler, director of marketing, Deep Submicron Division, Mentor.

Want to learn more about what is happening in silicon photonics? Mentor and OpSIS are presenting their work and its application in a session in the Mentor booth at DAC titled ‘Preparing for Pervasive Photonics.’ The Design Automation Conference (DAC) is held in Austin, TX, June 2 – 5. For event information, please go to the Mentor DAC web site at www.mentor.com/events/design-automation-confere[...].

(Mentor Graphics, Mentor, Calibre and Pyxis are registered trademarks and nmLVS, nmDRC, and DESIGNrev are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)

About Mentor Graphics

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of about $1,090 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: www.mentor.com.

Vector Software, the leading provider of software solutions for testing safety and business critical embedded applications, today announced the addition of three new courses to the VectorCAST Customer Training Webinar Series. Webinars scheduled for 2013 include:

July 2013 – Using VectorCAST to Validate MATLAB/Simulink Generated Code

August 2013 – Automatic Test Case Generation

September 2013 – Performing Static Analysis using VectorCAST/Lint

“We launched the program last year with a mission to help our customers get the maximum possible return on their VectorCAST investment by providing easily accessible, high-quality educational tools,” said Michael Rielly, Vector Software Marketing Director. “The response was tremendous. As a result, we’ve added these new courses and look forward to releasing additional courses in the coming months.”

The VectorCAST Customer Training Webinars are presented on a monthly basis. Each training session is 30-45 minutes in length and archived on the Vector Software website.

For a full listing and to register for an upcoming webinar, please visit: www.vectorcast.com/services/training

About Vector Software

Vector Software is the world’s leading provider of software testing solutions for safety and mission critical embedded applications. Companies worldwide in automotive, aerospace, medical devices, industrial controls, rail, and other industries, rely on Vector Software’s VectorCAST™. By automating and managing the complex tasks associated with unit, integration, and system level testing, VectorCAST helps organizations accelerate the development and ensure the reliability of their embedded software applications. Founded in 1989 by embedded software engineers, Vector Software is headquartered in East Greenwich, Rhode Island USA; with offices worldwide and a world-class team of support and technology partners.

Schaumburg, IL, May 22, 2013 – Epiq Solutions, an engineering firm specializing in the development of flexible wireless communications systems, has announced the Matchstiq™ Z1, the latest addition to the company’s small form factor software defined radio (SDR) product line. The Matchstiq Z1 combines a Xilinx® Zynq™ Z-7020 System-on-Chip running Linux with a flexible RF transceiver capable of tuning between 300 MHz and 3.8 GHz to provide a complete software defined radio solution. The entire platform measures only 2.2” x 4.6” x 0.9”. With the addition of the Matchstiq Z1, customers now have an option to deploy more capable signal processing systems while maintaining the same footprint as the existing Matchstiq platform.

“The Zynq System-on-Chip is a natural fit for handheld SDR platforms, where size, weight, and power consumption must be balanced against application processing requirements”, noted John Orlando, CEO at Epiq Solutions. “Our Matchstiq Z1 redefines what is possible with a small form factor SDR, and we’re excited to be at the forefront of this increasing market space”.

The Matchstiq Z1 utilizes the Atlas-I-Z7e™, a rugged system-on-a-module developed by iVeia. The Atlas-I-Z7e hosts the Zynq Z-7020 SoC running a Linux 3.6 kernel inside of Matchstiq. “Epiq Solutions continues to innovate in the field of software defined radio”, noted Michael Fawcett, CTO of iVeia. “Our Zynq-based modules and hybrid computing framework are a great fit for the Matchstiq Z1 and we’re thrilled that Epiq selected the Z7e as their solution”.

When combined with the library of signal processing applications available from Epiq Solutions, or other signal processing frameworks such as GNU Radio or REDHAWK, Matchstiq enables countless capabilities including use as an agile point-to-point data modem, LTE survey tool, or portable spectrum analyzer. Development kits are also available for end users who want to create their own custom applications.

The Matchstiq Z1 starts shipping in June 2013. Pre-orders are currently being accepted. For more information, please visit www.epiqsolutions.com/matchstiq.

About Epiq Solutions

Epiq Solutions designs and builds state-of-the-art wireless systems for both commercial and government applications. These applications include the detection, classification, and location of radio emitters, as well as real-time processing and decoding of Layers 1, 2, and 3 for numerous wireless radio standards (including 2G/3G/4G cellular). For more information regarding Epiq Solutions’ products and services, please visit www.epiqsolutions.com.

SAN RAMON, CA. The GENIVI Alliance today announced it has entered into a liaison agreement with JASPAR (Japan Automotive Software Platform and Architecture) to align networking software requirements for automotive Bluetooth and Ethernet, specific to in-vehicle infotainment systems and related applications by year-end.

This agreement between JASPAR and GENIVI, an automotive and consumer electronics industry association driving the development and adoption of an open in-vehicle infotainment (IVI) reference platform, will help drive the collaboration of defined standards for these two communications technologies as areas of mutual interest for open source requirements alignment.

“The collaboration between JASPAR and GENIVI is a prime example of another technical relationship event that will ease integration of wired and wireless communications for next generation infotainment systems,” said Matt Jones, vice president, GENIVI Alliance.

This liaison agreement is more evidence of how GENIVI is aligning itself with different industry groups and associations in an effort to find technical links and efficiencies with similar groups to drive the development and adoption of an open IVI software platform for infotainment systems. In all cases, GENIVI will continue to leverage open source development to further encourage universally accepted standards throughout the industry, ensuring the most cost effective and robust implementation of these rapidly changing technologies.

“Our partnership will leverage open source development and universally accepted standards for Bluetooth and Ethernet, ensuring the most cost effective and robust implementation of these technologies,” said Hideki Goto, chair of Next-generation High-speed In-Vehicle Network WG of JASPAR.

About GENIVI Alliance

The GENIVI Alliance is a non-profit industry association whose mission is to drive the broad adoption of an In-Vehicle Infotainment (IVI) open source development platform. GENIVI will accomplish this by aligning requirements, delivering reference implementations, offering certification programs and fostering a vibrant open source IVI community. GENIVI’s work will result in shortened development cycles, quicker time-to-market, and reduced costs for companies developing IVI equipment and software. Comprised of more than 175 member companies, GENIVI is headquartered in San Ramon, Calif. Please visit www.genivi.org for more information.

Wokingham, UK – 21st May 2013. EnSilica has announced that it has partnered with Cross Border Technologies to accelerate the sales of both its IC design services and system IP solutions in key European and Asian markets, particularly Germany, France, Japan and Korea. The move is intended to build on the initial design win successes that EnSilica has recently achieved in these markets, particularly for mixed signal applications.

Headquartered in Germany (Munich area) with subsidiary offices in (Tokyo) Japan and Korea (Seoul), Cross Border Technologies specialises in the provision of business development and representative sales services for technology companies wanting to penetrate these geographic markets quickly and efficiently. The company’s personnel deliver decades of sales and business development expertise derived from their experience working in similar roles and markets for Germany’s leading semiconductor company.

“We have extended our international footprint considerably over the past few years,” said Ian Lankshear, CEO of EnSilica. “Our partnership with Cross Border Technologies will enable us to actively develop new business opportunities in key European and Asian markets, in parallel with our ongoing expansion efforts in the USA and our core home market.”

The appointment of Cross Border Technologies complements EnSilica’s existing international focus on the USA. EnSilica has made significant in-roads in the USA and Canada with sales of its eSi-RISC family of highly configurable, embedded processor cores that are particularly suited to low power needs. It has also recently established a subsidiary company in Sunnyvale, California. The appointment further complements the opening of EnSilica’s design and verification centre in India last year.

“EnSilica is an ambitious company and we are extremely pleased they have chosen to partner with us to create a stronger presence in Germany, France, Japan and Korea,” said Dr Andreas vom Felde, Managing Director of Cross Border Technologies. “We have a proven track record in these markets, so we are extremely confident that we shall generate quality, revenue-creating opportunities for EnSilica’s IC design services and system IP solutions. From board level executives through middle management to engineers, we make our extensive connections work effectively for our clients.”

EnSilica’s IC design services provide a scalable resource for projects requiring larger teams to accelerate timescales or deal with complex tasks such as turnkey ASIC designs or UVM based functional verification. Cross Border Technologies will represent EnSilica’s full range of turnkey ASIC and FPGA design capabilities, from system level design, RTL coding and advanced verification using a range of methodologies including UVM through to analog/mixed-signal modelling, physical implementation and embedded software services. Additionally, Cross Border Technologies will represent EnSilica’s successful portfolio of IP including its eSi-RISC highly configurable 16/32 bit embedded processors, eSi-Comms range of communications IP, eSi-Connect range of processor peripherals and eSi-Crypto encryption IP.

About EnSilica

EnSilica is an established company with many years experience providing high quality IC design services to customers undertaking FPGA and ASIC designs. EnSilica has an impressive record of success working across many market segments with particular expertise in multimedia and communications applications. Customers range from start-ups to blue-chip companies. EnSilica can provide the full range of IC design services, from System Level Design, RTL coding and verification through to either a FPGA device or the physical design for ASIC designs. EnSilica also offers a portfolio of IP, including a highly configurable 16/32 bit embedded processor called eSi-RISC, the eSi-Comms range of communications IP, eSi-Connect range of processor peripherals and eSi-Crypto encryption IP. For further information about EnSilica, visit www.ensilica.com.

Wind River has released the latest version of Wind River Simics. Key features include an expanded graphical interface to help beginners start modeling and configuring Simics systems even faster, checkpoint improvements for easier collaboration, and additional simulation performance boosts to enable simulation of larger target systems. Wind River Simics is a full system simulator that speeds software development by allowing ground-breaking techniques that are virtually impossible with physical hardware, which can help teams dramatically accelerate project schedules.

In the webinar, attendees will learn about a case study involving the US Department of Defense and how they utilize Linux VDI for their distributed Linux systems while maintaining and even increasing the level of security for their systems.

Virtual Bridges will be available for a Q&A session immediately following the E-cast.

• Who: Curt Schwaderer, Technology Editor, OpenSystems Media (E-cast Moderator) and industry experts

• What: Industry expert from Leo Reiter, CTO, Virtual Bridges present a live Open Systems Media E-cast, “Productivity Versus Security: The Linux Virtual Desktop Debate”

• When: Wednesday, May 22, 2013 at (2:00 p.m. EDT/11:00 a.m. PT)

• Where: To attend the E-cast, participants can register at ecast.opensystemsmedia.com/399

About OpenSystems Media

OpenSystems Media has been a leading publisher of electronics magazines, e-mail newsletters, websites, and product resource guides for more than 25 years. OpenSystems Media is also the leader in driving leads and awareness through social media and is the largest producer of lead-generation tools such as webcasts, whitepapers, product directories, Tech E-Briefs, TechChannels, and Techcasts. OpenSystems Media offers E-casts and Techcasts for engineers and provides interactive tools where engineers can communicate directly with presenters and top industry editors. OpenSystems Media also offers the Embedded Computing Design and DSP-FPGA iPhone and iPad app for the embedded industry. Current publications include: Embedded Computing Design; Military Embedded Systems; CompactPCI, AdvancedTCA, & MicroTCA Systems; DSP-FPGA.com; PC/104 and Small Form Factors; EDA Digest, and VITA Technologies. For more information, visit www.opensystemsmedia.com.

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