FPGA

FPGAs speed trading on Wall Street

August 24, 2012 — Mike Demler, Editorial Director

The degree to which financial markets are now run by computers, for better or worse, was brought into the news headlines recently when Nasdaq OMX Group Inc. - the owners of the NASDAQ stock exchange - proposed to pay US$62 million to brokers as compensation for losses attributed to trading "glitches" during Facebook's now infamous IPO.  According to the Wall Street Journal, the high number of orders for Facebook's stock overloaded Nasdaq's process for matching buy and sell orders, causing a delay of nearly 20 minutes for trade confirmations to be communicated.

NASDAQ is a completely computerized stock exchange, and one of the most lucrative markets for High-Performance Computing (HPC).  Brokerage firms are now competing with each other to develop sophisticated algorithms, which seek to exploit transient pricing fluctuations and discontinuities, through computerized High-Frequency Trading (HFT).  At the Hot Interconnects Conference on August 23, Dr. John W. Lockwood, CEO and founder of Algo-Logic, said that HFT accounted for more than 70% of all trades made on US equity markets during 2010.

In his presentation on "A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT)", Lockwood said that the challenges for such systems are to reduce latency - being able to execute trades faster than other investors,  and jitter - the ability to maintain consistent and fair trade executions. He then went on to compare current solutions for HFT, in software and hardware, before describing his company's FPGA-based solution.

According to Lockwood, most software for HFT operates on Network Interface Cards (NICs), which are capable of achieving Round Trip Time (RTT) on the order of a few microseconds, on -based systems. Graphics Processor Units (GPUs) see use for stock trading applications on Wall Street, for their high throughput capability, but are not suitable for HFT since they are not optimized for latency.   Application Specific Integrated Circuits (ASICs) can achieve sub-microsecond latency, said Lockwood, but they also don't fit in the HFT market because they lack the flexibility needed to update algorithms on an almost daily basis. Algo-Logic has developed their solution on , which can achieve latency of 0.2 microseconds, while also providing the necessary programmability. As a result, FPGAs now power every platform on Wall Street, according to Lockwood.

Hybrid systems have been built for HFT, combining a CPU with a NIC and an FPGA, but Lockwood explained that such systems may suffer from Amdahl's Law, in which parallel processing suffers limited performance due to the slowest sequential operation.  Algo-Logic proposes a pure FPGA approach to handle all of the HFT algorithm computing through parallel processing, to avoid these limitations. Besides reducing latency, FPGAs essentially eliminate jitter, down to the nano-second level of uncertainty for when a packet arrives relative to the next clock edge.

FPGAs still suffer compared to software solutions in one critical parameter - development time. A new algorithm can be compiled in minutes, but developing new FPGA hardware can take months or even years.  To minimize development time, Algo-Logic developed their low latency library of components, such that the system infrastructure on the FPGA can be controlled and modified through software.

Lockwood said that the components in their system include 10GbE interfaces, built on Xilinx FPGAs.  The FPGA library also includes a set of protocol processors, to decipher trades that are coded to the various standards in use on major international trading exchanges. Data packets for a trade include fields for information such as order number, buy/sell, number of shares, stock identifier, and price. Market data gets stored in block RAM tables inside the FPGA.  Lockwood claimed that by using his company's pre-built HFC library, customer could cut system development time to weeks or months.  Algo-Logic demonstrated an implementation of their library for SEC trade compliance checking, built on a NetFPGA 10G card.

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