Osaka, Apr 23, 2012 – HuMANDATA LTD., a manufacturer of various FPGA/CPLD boards in Japan, today released EDX-301 of USB-FPGA board powered by Xilinx, Inc.’s Spartan-6LX FPGA (XC6SLX16-2CSG225C).

HuMANDATA’s EDX-301 is equipped with Xilinx high-spec Spartan-6LX FPGA on a compact, 53 x 54mm PCB. A configuration device, on-board oscillators, user switches and LEDs are mounted as minimum components of FPGA design and development. EDX-301 operates with 5.0 V external input or USB bus power. The EDX-301 provides 56 user I/Os, which are divided into two I/O banks. FTDI’s FT2232H (Dual channel USB controller IC) is equipped. One channel is available for a user communication interface. The other channel is configured as an I/F for FPGA configuration and configuration device access.

No download cable is needed with original configuration tool ” BBC [EDX-301]“.

HuMANDATA’s ACM/XCM series boards are designed on same PCB size and connector layout. So it is easy to swap the board to another one, and you can quickly try a new FPGA/CPLD.

HuMANDATA’s EDX-301 is compliant with the RoHS Directive, and is designed for lead-free soldering.

For more information, please visit: www.hdl.co.jp/en/index.php?id=215

Specifications:

- XILINX Spartan-6 (XC6SLX16-2CSG225C) 

- Configuration Device(Micron, M25P16-VMN) 

- USB control IC (FTDI, FT2232H) 

– FPGA Configuration 

– Configuration device access (Write/Reset/Erase) 

– User communication I/F 

– Free original configuration Tool ” BBC [EDX-301]“ 

- 50MHz Oscillator (50 ppm) or External inputs 

- User Switch (Push x1, DIP x1bit) 

- User LED x4 

- Seven segment LED module x1 

- Status LED (Power, Done) 

- Power-on Reset 

- JTAG Connector(7 pin socket) for download cable connection 

- JTAG buffer for stable download or debug 

- 5.0 V single power supply operation (External input or USB Bus power) 

- High quality six layers PCB.(Immersion gold) 

- Compact size 2.087″ x 2.126″ (53 x 54 mm) 

- ESD and Surge protection component for USB I/F 

- Tested all I/O 

- RoHS compliance 

- Made in Japan 

About Xilinx

Xilinx (NASDAQ: XLNX) is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com.

About HuMANDATA LTD.

HuMANDATA LTD. is a manufacturer of various FPGA/CPLD boards as well as electrical equipment in Japan. Established in July 1990, the company can supply superior products with short lead-time, and can produce various kinds of products in small lots. For more information, please visit www.hdl.co.jp/en.

Xilinx has launched a new set of Targeted Design Platforms (TDP), at the 2102 National Association of Broadcasters (NAB) show in Las Vegas this week. The Display TDP supports development of content for emerging quad High Definition 4K2K (Quad HD) displays. Aaron Behman, Senior Manager for Broadcast & Consumer Market Segments, says that Xilinx worked with alliance partner Tokyo Electron Device Ltd. on the Display TDP, which will be sold under the inrevium brand for $2,995. The Display TDP uses the 28nm Kintex-7 FPGA. Xilinx and TED include three reference designs with the Display TDP, including a mosaic design function which enables users to stitch together four individual 1920×1080 video streams into a single 4K2K display. Other reference designs are provided for performing standard HD to 4K2K up-conversion, and a 4K2K frame rate converter from 60Hz to 120Hz

Xilinx has also updated their Real-Time Video Engine (RTVE) TDP to the Kintex-7 FPGA. The new version adds the capability for dual processing video pipelines, for applications such as picture-in-picture. A new web GUI allows connecting to a LAN router for remote control of the TDP from a tablet, PC or smartphone. Xilinx targets the RTVE at applications in broadcast switchers and routers, multiviewers and display systems.

Xilinx designed a third set of TDPs for Edge Quadrature Amplitude Modulation (QAM) applications, in Hospitality QAM for hotel room Video-on-Demand (VoD), and Converged Cable Access Platforms (CCAP). Designers can add an FPGA Mezzanine Card (FMC) to the TDP, with Digital-Analog Converters (DACs) from Analog Devices (AD9739A) or Maxim Integrated Products (MAX5882). The Edge QAM TDP will be available with the Kintex-7 KC705 Base Board and Kintex-7 K325T FPGA, or the Virtex-7 VC707 Evaluation Board and Virtex-7 485T FPGA. Xilinx is also developing a Quad port version, which will employ dual Virtex-7 X485T/X690T FPGAs.

Oasys Design Systems, a provider of chip design software, today announced it has closed Series B Funding with investments from Intel Capital, Intel’s global investment organization, and Xilinx, a leading provider of programmable platforms. Funding will be used as working capital to expand Oasys’ research and development team, as well as for further expansion of its worldwide support structure.

Chip Synthesis™ is a fundamental shift in how synthesis is applied to the design and implementation of integrated circuits (ICs). Traditional block-level synthesis tools do a poor job of handling chip-level issues. Oasys’ RealTime Designer™ is the first design tool for physical register transfer level (RTL) synthesis of 100-million gate designs and produces better results in a fraction of the time needed by traditional logic synthesis products. It features a unique RTL placement approach that eliminates unending design closure iterations between synthesis and layout.

“Xilinx has licensed Oasys technology and achieved excellent results across a wide range of designs,” says Salil Raje, vice president of Software and IP Product Development at Xilinx. “We have a long-standing and productive working relationship with the Oasys team and we are pleased to extend our support through this investment.”

“Oasys’ technology has the potential to positively impact the design flow for VLSI chip implementation,” adds Shishpal Rawat, director, Business Enabling Programs at Design Technology Solutions Group, Intel. “This is a new way of thinking for next-generation chip design implementation. We are pleased to invest in Oasys.”

“We are excited to have the venture capital arm of the number one semiconductor company and the number one programmable platforms vendor as investors in Oasys,” remarks Paul van Besouw, Oasys’ president and chief executive officer. “With tapeouts at 45- and 28-nanometer process nodes, Realtime Designer is the proven synthesis solution offering substantial runtime and capacity advantages for some of the world’s most complex designs. Intel Capital and Xilinx have given us strategic support, and their investment will enable us to scale commercially and to continue to advance our technology.”

Previously, Oasys announced that several top U.S. semiconductor companies, such as Texas Instruments, Qualcomm and Xilinx, are already using RealTime Designer. In 2011, Oasys enhanced its Chip Synthesis platform by adding design for test (DFT) capabilities and support for chip-level power design, further extending the fast speed and high capacity of RealTime Designer. These additional features completed the fully integrated Chip Synthesis design flow.

About Oasys Design Systems

Oasys Design Systems is a privately funded electronic design automation (EDA) software supplier with a revolutionary new platform called Chip Synthesis™, a fundamental shift in how synthesis is used to design and implement ICs larger than 20-million gates. It has attracted the support of legendary EDA leaders and its RealTime Designer™ product is in use at leading-edge semiconductor and systems companies worldwide. Corporate Headquarters is located at 3250 Olcott Street, Suite 120, Santa Clara, Calif. 95054. Telephone: (408) 855-8531. Facsimile: (408) 855- 8537. Email: info@oasys-ds.com. For more information, visit: www.oasys-ds.com.

Impulse Accelerated Technologies today announced an Arista Networks version of the Impulse C-to-FPGA optimizing compiler, in a kit providing everything needed for Arista users to compile their C algorithms to the FPGA integrated in Arista’s new 7124FX AppSwitch. Impulse C is a C-language development environment for FPGAs that allows software algorithms to be quickly and efficiently implemented in programmable hardware.

The Arista 7124FX AppSwitch is a 24-port 1/10-Gbps switch with hot-swappable redundant power supplies and fans packed into a 1RU box. What makes the 7124FX unique is the FPGA containing 6.2 million gates that are truly field programmable. The 7124FX is targeted at applications that can make use of high-capacity, low-latency logic in FPGAs at the network level, such as high-frequency trading, deep packet inspection, and media transcoding.

Where FPGA programming normally requires hardware design language (HDL) programming skills, the Impulse kit provides a means of compiling C code to the AppSwitch FPGA. In this tool flow, C algorithms can be expressed as streaming processes that are parallelized for acceleration of 10 to 100X, relative to CPU implementations. Impulse C can be used in conjunction with standard C development tools and debuggers, speeding the development and maintenance of algorithms requiring frequent updating.

Impulse C also facilitates the step-by-step validation from hardware-independent C-language to full hardware simulation, through integration with hardware simulators including ModelSim (from Mentor Graphics) or Active-HDL (available from Aldec, Inc.) Impulse C is the most widely accepted tool of this type, with a worldwide user base and over a decade of development.

Arista 7124FX AppSwitch platform support is provided in the Impulse compiler, speeding development time and reducing the need for hardware design expertise. The Impulse C AppSwitch development kit includes reference designs, Altera Quartus synthesis software, necessary drivers and even a programming cable: everything needed to get started programming the 7124FX.

Support from Impulse is available at multiple levels. The standard Impulse C kit for AppSwitch provides examples of “bump in the wire” processing, allowing software developers to more quickly refine their algorithms for FPGA parallelism. Beyond that, Impulse can also offer sample code and consulting to handle various exchange protocols, libraries of analytic functions and full-custom solutions. The 7124FX AppSwitch Development Kit is available through Arista Networks worldwide.

About Impulse

Founded in 2002, Impulse Accelerated Technologies provides software, IP, and training help application developers accelerate their algorithms in FPGA hardware. Impulse C is used worldwide by more design teams than any other C-to-FPGA toolset. Impulse users range from NASA, to Harvard, to Wall Street. www.ImpulseC.com.

HPEC Demo Highlights >95% Data Transfer Efficiency of SRIO in an OpenVPX™ System

ASHBURN, VA – March 13, 2012 – Curtiss-Wright Controls Defense Solutions (CWCDS), a business unit of Curtiss-Wright Controls, has announced that it has successfully demonstrated extremely high data transfer efficiency in an OpenVPX™-based High Performance Embedded Computing (HPEC) system. The demonstration featured the world’s first HPEC 6U VPX subsystem in which Serial RapidIO® (SRIO) data was transmitted between an Intel® 2nd Generation Core® i7 processor, Freescale® 8640 Power® Architecture processor and a Xilinx® Virtex®-6 FPGA, the three leading building blocks of high performance Digital Signal Processing (DSP) embedded systems for defense and aerospace C4ISR applications such as image, signal and radar processing. The demonstration, based on Curtiss-Wright’s rugged COTS OpenVPX board modules, was also the industry’s first to show an Intel CPU running Gen 2 SRIO, an achievement made possible through use of the IDT’s groundbreaking Tsi721 PCIe2-to-SRIO2 RapidIO bridge. Results of the demonstration include data transfers between Intel CPUs rated at 1.7GB/s achieving 95% of the theoretical maximum wire speed for a given physical link into the switch fabric. Furthermore, these results were achieved with a near zero overhead burden on the processor thanks to the high-speed DMA feature of the Tsi721 and SRIO’s inherent guaranteed-by-hardware data transmission.

With support for both Gen1 and Gen2 SRIO and true interoperability between all three of the embedded industry’s most popular processor and FPGA device types, this demonstration highlights the advances that have been made in bringing open standard-based HPEC processing to rugged military embedded systems.

“Gen2 Serial RapidIO is the highest speed fabric available to date for use in OpenVPX™ systems, with speeds up to 20 Gbps. Using the Tsi721 in a x4 configuration at 5 Gbaud, resulting performance was 40% faster than 10 Gigabit Ethernet,” said Lynn Bamford, senior vice president and general manager of Curtiss-Wright Controls Defense Solutions. “We are very excited to be the first COTS system solutions provider to demonstrate the levels of interoperability to make high performance HPEC systems practical and cost-effective. The emergence of COTS-based HPEC processing in compact, rugged deployable subsystems promises to deliver supercomputing performance in SWaP-constrained embedded military applications.”

“We are pleased to deliver the Tsi721 into the embedded computing market, allowing customers to cluster large systems with PCIe enabled processors such as the Intel Core i7 with the 20 Gbps per link performance of RapidIO Gen2 based systems,” said Tom Sparkman, vice president and general manager of the Communications Division at IDT. “With our production RapidIO Gen2 switches and PCIe2-to-SRIO2 bridge, customers such as Curtiss-Wright Controls Defense Solutions are able to provide highly scalable, high bandwidth, low latency multi-processor systems while delivering 95% of available bandwidth into i7 processors. This is achieved with 40% higher performance than Ethernet options and with no protocol termination overhead.”

The SRIO Interoperability Demonstration comprised

* Intel 2nd Generation Core i7 CPU to Intel 2nd Generation Core i7 CPU SRIO data transmission using the IDT Tsi721 PCIe to SRIO bridge 

* Intel 2nd Generation Core i7 CPU to Freescale 8640 SRIO data transmission 

* Intel 2nd Generation Core i7 CPU to Xilinx Virtex6 (with SRIO endpoint IP) FPGA SRIO data transmission 

* Use of IDT CPS1432 Gen2 SRIO switch 

* Use of IDT Tsi578 Gen1 SRIO switch 

* The Intel processors were located on the Curtiss-Wright CHAMP-AV8 dual 2nd Generation Core i7 boards. 

* The 8640 processor and Xilinx Virtex6 FPGA were located on the Curtiss-Wright CHAMP-FX3 FPGA processing engine with FMC I/O expansion. 

All of the SRIO transfers in the demonstration were bi-directional. Interoperation included successful use of three different DMA engines native to each device: Tsi721, 8640 and Xilinx V6.

Curtiss-Wright Continuum HPEC Subsystem Components

The CHAMP-AV8 and CHAMP-FX3 are examples of elements of Curtiss-Wright’s Continuum HPEC initiative. Continuum HPEC systems consist of a large number of distributed processors, IO, and software stacks connected by a low latency system fabric. HPEC capabilities are developed in our Ashburn, VA, HPEC Center of Excellence. With scalable architectures, dataflow modeling and configuration validation, Curtiss-Wright’s Continuum HPEC customers can source embedded supercomputing platforms that integrate Intel®-based multi-processor boards with AVX, GPGPU co-processors, Xilinx® Virtex® 6 FPGAs, SRIO and Ethernet switching with Open Standard software solutions including VxWorks®, and Linux with OpenMPI and OFED software interfaces. Supported products include Curtiss-Wright’s CHAMP-FX3 Virtex6 FPGA board, the CHAMP-AV8 dual 2nd Generation Core® i7-based multiprocessor board, the VPX6-1956 2nd Generation Core i7 SBC, the VPX6-6902 sRIO/Ethernet switch, and the VPX6-490 GPGPU module. OpenVPX™ enclosures are supported including a small 5-6 slot and 19” rack 16-slot air-cooled Chassis.

For price and availability information on CWCDS HPEC solutions, please contact the factory. Click here for more information on the CHAMP-AV8. Click here for more information on the CHAMP-FX3.

Sales & Editorial Contacts

For additional information on CWCDS HPEC solutions please visit: www.cwcdefense.com.

For editorial information regarding Curtiss-Wright Controls Defense Solutions products or services, contact John Wranovics, public relations director, Curtiss-Wright Controls, Tel: (925) 640-6402; email: jwranovics@curtisswright.com.

Sales inquiries: Please forward all Sales and reader service inquiries to Jerri-Lynne Charbonneau, Curtiss-Wright Controls Defense Solutions, Tel: (613) 254-5112; Fax: (613) 599-7777; e-mail: sales@cwcdefense.com. Curtiss-Wright Controls Defense Solutions, Tel: (978) 952-2017.

About Curtiss-Wright Controls Defense Solutions

Curtiss-Wright Controls Defense Solutions (CWCDS) is a long established technology leader in the development of rugged electronic modules and systems for defense applications. CWCDS serves as a technology and integration partner to its customers, providing a full range of advanced, highly engineered solutions from modular open systems approaches to fully custom optimized solutions. Our unmatched capabilities and product breadth span from industry standard based COTS modules to complete electronic subsystems. The company’s modules and systems are currently deployed in a wide range of demanding defense & aerospace applications including C4ISR systems, unmanned subsystems, mission computing, fire control, turret stabilization, and recording & storage solutions. Additionally, the company’s broad engineering capabilities combine systems, software, electrical, and mechanical design expertise with comprehensive program management and a broad range of life-cycle support services. For more information visit www.cwcdefense.com.

About Curtiss-Wright Controls, Inc.

Headquartered in Charlotte, NC, Curtiss-Wright Controls is the Motion Control segment of Curtiss-Wright Corporation. With manufacturing facilities around the world, Curtiss-Wright Controls is a leading technology-based organization providing niche motion control products, subsystems and services internationally for the aerospace and defense markets. For more information, visit www.cwcontrols.com.

###

This press release contains forward-looking statements made pursuant to the Safe Harbor provisions of the Private Securities Litigation Reform Act of 1995. Such statements, including statements relating to Curtiss-Wright Controls’ expectations of future performance of this contract, the continued relationship with a customer, the continued success of these military programs and the future opportunities associated with these programs, are not considered historical facts and are considered forward-looking statements under the federal securities laws. Such forward-looking statements are subject to certain risks and uncertainties that could cause actual results to differ materially from those expressed or implied. Readers are cautioned not to place undue reliance on these forward-looking statements, which speak only as of the date hereof. Such risks and uncertainties include, but are not limited to: a reduction in anticipated orders; an economic downturn; changes in competitive marketplace and/or customer requirements; a change in US and Foreign government spending; an inability to perform customer contracts at anticipated cost levels; and other factors that generally affect the business of aerospace, defense contracting, marine, electronics and industrial companies. Please refer to the Company’s current SEC filings under the Securities Exchange Act of 1934, as amended, for further information.

Osaka, Mar 12, 2012 – HuMANDATA LTD., a manufacturer of various FPGA/CPLD boards in Japan, today released AP68-04, a new stamp size PLCC FPGA module powered by Altera Corp.’s Cyclone III FPGA (EP3C25U256C8N).

HuMANDATA’s AP68-04 comes in compact 25.3 x 25.3mm board that is so compact it can be equipped on universal boards by using a 68-pin DIP IC socket. The AP68-04 operates with only 3.3V power supply and has an on-board 1.2V and 2.5V regulators.

The AP68-04 PLCC FPGA module provides 50 user I/Os, which are divided into two Vccio groups, an on-board 50MHz oscillator, two user LEDs, one user switch, a Power-on Reset IC, and a configuration device.

HuMANDATA’s AP68-04-25 is compliant with the RoHS Directive, and is designed for lead-free soldering.

For the high resolution image, please click here: www.hdl.co.jp/press/2012/12C0069.jpg.

For the full press release, please visit: www.hdl.co.jp/en/index.php?id=213.

For more information, please visit www.hdl.co.jp/en/index.php?id=206.

Specifications:

- Altera CyconeIII (EP3C25U256C8N) 

- Configuration device (Altera: EPCS16) 

- 50 user I/Os 

- Separable Vccio (VIO(A) and VIO(B)) 

- On-board Oscillator, 50MHz 

- User LED (Red x2) 

- User Switch (Slide x1) 

- 3.3V single power supply operation with on-board 1.2V/2.5V regulators 

- High quality eight layers PCB (Immersion gold) 

- Compact 68pin PLCC size (25.3 x 25.3mm) 

- Tested all I/O 

- RoHS compliance 

- Made in Japan 

About HuMANDATA LTD.

HuMANDATA LTD. is a manufacturer of various FPGA/CPLD boards as well as electrical equipment in Japan. Established in July 1990, the company can supply superior products with short lead-time, and can produce various kinds of products in small lots. For more information, please visit www.hdl.co.jp/en .

About Altera Corp.

Altera Corp. (NASDAQ: ALTR) is the pioneer of programmable logic solutions, enabling system and semiconductor companies to rapidly and cost effectively innovate, differentiate, and win in their markets. Altera offers FPGAs, SoC FPGAs, CPLDs, and ASICs in combination with software tools, intellectual property, embedded processors and customer support to provide high-value programmable solutions to over 13,000 customers worldwide. Founded in 1983, Altera is headquartered in San Jose, California, and employs approximately 2,600 people in 19 countries. For more information, please visit www.altera.com.

Contact:

HuMANDATA LTD.

Tel: +81-72-620-2002 (Japanese)

Fax: +81-72-620-2003 (Japanese/English)

URL: www.hdl.co.jp/en/

Lattice Semiconductor Corporation today announced it will exhibit at Mobile World Congress, Feb 27th – March 1st at Fira de Barcelona in Barcelona, Spain. Lattice will be located in Hall 2.1, Stand 2.1A56, and will be featuring the company’s mobileFPGA™ platforms including the new iCE40™ and MachXO2™ FPGAs and ispMACH® 4000ZE CPLDs.

More than 20 mobile products, where Lattice mobileFPGA devices enabled product designers to rapidly add differentiating features to their products, will be displayed. The company will also give demonstrations including a video camera-to-LVDS display bridge that supports 1366 x 768 pixels and 525 Mb/s transfer rates in a low cost mobileFPGA device. “Over the last two years Lattice has demonstrated the need for and viability of mobileFPGA devices” said Gordon Hands, director of marketing at Lattice Semiconductor. “Mobile World Congress” represents a great opportunity for us to further engage the ecosystem by demonstrating how to enable rapid innovation at a low cost.”

With a combination of small form factor (as small as 2.5 x 2.5mm), low power (as low as 18uW standby power) and high-volume pricing (starting below $1.00 per unit), Lattice programmable devices enable customers to easily differentiate products while dramatically decreasing time to market for mobile devices where extended battery life and portability are required. Products incorporating Lattice mobileFPGA devices include: smart phones, tablets, e-readers, digital cameras and personal navigation devices. In system programmability allows manufacturers of these products to make design changes without significant circuit board modifications.

The Company’s extensive library of more than 40 IP cores, including multiple memory controller, display, connectivity, and sensor management IP cores, together with development kits, reference designs, and state of the art development tools, help designers decrease development time, supporting instant innovation.

The IC-FEP-VPX3b is ideal for applications such as radar, sonar, electronic warfare, imaging and communications, by offering high performance logic and powerful Digital signal processing slice resources, while maintaining low power.

The FMC site, being VITA 57.1 compliant, interconnects ADC, DAC, general IOs, video, Serial FPDP cards, or additional FPGA FMC modules.

In terms of processing unit, the board, based on a Xilinx Virtex-6 FPGA, offers two banks of 40-bit 1.25 GB DDR3 memory, and a Spartan-6 control node. Complying with the VPX standard, the IC-FEP-VPX3b, features four 4-lane fabric ports on the P1 and general purpose IOs (on P2).

Available in standard, rugged and conduction-cooled grades, the IC-FEP-VPX3b comes with the Xilinx ISE design tool

The IC-FEP-VPX3b enriches the extended comprehensive range of Interface Concept open VPX boards among which, SBC, Ethernet and PCIe switch, Graphic and storage modules.

(www.interfaceconcept.com/index.php?rub=vpx_prod[...]).

NORWOOD, Mass. — Analog Devices, Inc. (ADI), the leading provider of data conversion technology*, today introduced two data converter FMC boards (FPGA mezzanine cards) that connect to Xilinx Inc.’s new 28nm 7 series FPGA (field programmable gate array) evaluation kits. ADI’s high-speed AD9739A D/A converter and AD9467 A/D converter FMC boards support multiple generations of Xilinx kits — including the company’s new Kintex-7 FPGA evaluation kits Xilinx announced today. The new Analog Devices FMC boards include all of the HDL (hardware description language) code and device drivers needed for designers to engage in rapid prototyping and reduce development time and risk. Both products are being demonstrated at the DesignCon 2012 trade show in Santa Clara, Calif., in the Xilinx booth (#732).

“The availability of low cost commercial off the shelf hardware, such as the AD9739A FMC board, and the new Kintex-7 development boards, allows our customers to quickly prototype and evaluate many of the IP Cores which we offer,” said Jean-Claude Basset, technical director/manager, MVD Cores**, a Certified Member of the Xilinx Alliance Program. “We have verified our digital RF up converter IP cores with the AD9739A FMC board and Xilinx’s Virtex-6, Kintex-7 and Spartan-6 boards and recommend that our customers use this hardware to evaluate our IP Cores.”

For information about ADI’s FMC boards: www.analog.com/Xilinx

To order ADI’s FMC boards***:

AD9739A FMC: www.digilentinc.com/AD9739A-FMC

AD9467 FMC: www.digilentinc.com/AD9467-FMC

Get support at ADI’s EngineerZone™ online technical support community: ez.analog.com/community/fpga

To learn more about ADI’s data conversion technology: www.analog.com/en/data-converters/products/inde[...]

“ADI’s new FMC boards, integration software and industry-leading data conversion expertise help engineers designing with Xilinx’s Kintex-7 series FPGAs to move more quickly through system prototyping and get their products to market faster,” said Dave Babicz, director of Global Alliances, Analog Devices. “At the same time, our new boards are backward compatible with other Xilinx FPGAs, which means that engineers will be able to design products that meet a range of performance criteria using a simplified design environment.”

“Xilinx’s Targeted Design Platforms accelerate system development and integration by providing the industry’s most comprehensive development kits, which include boards, tools, IP cores, reference designs and FMC support,” said Raj Seelam, senior marketing manager, Targeted Design Platforms, Xilinx. “Our adoption and support for open standards such as FMC and the AMBA®4 AXI IP core interface strengthens the ability of Xilinx Alliance Program members like Analog Devices to deliver key technologies that make it easier for FPGA users to complete their projects.”

More About ADI’s AD9739A D/A Converter FMC Board

ADI’s AD9739A FMC board is based on the AD9739A, a 14-bit D/A converter that enables cable television and broadband operators to synthesize the entire cable spectrum up to 1 GHz into a single RF (radio frequency) port, while consuming a maximum of 1.1 W of power. The AD9739A 14-bit, 2.5-GSPS D/A converter’s wide bandwidth and dynamic range enable cable operators to increase the QAM (quadrature amplitude modulation) channel densities by 20 times over the densities found in today’s cable modems. Competing D/A converter solutions require an additional 28 LVDS (low-voltage differential signaling) pairs for the data interface.

More About ADI’s AD9467 A/D Converter FMC Board

ADI’s AD9467 FMC board is based on the AD9467, which is a 16-bit, 250-MSPS A/D converter that operates on 35 percent less power at a 25 percent higher sampling rate than any other 16-bit data converter. The AD9467 provides a new level of signal processing performance for test and measurement instrumentation, defense electronics and communications applications where high resolution over a wide bandwidth is needed.

The AD9467 delivers resolution and a fast sample rate while simultaneously achieving a high SFDR (spurious-free dynamic range) of up to 100 dBFS and SNR (signal-to-noise ratio) performance of 76.4 dBFS. The device’s SFDR of 90 dBFS up to 300 MHz analog input and 60-femtosecond rms (root mean square) jitter help lower the signal chain bill of materials component count by allowing engineers to increase system performance at higher intermediate frequencies, thereby reducing the number of signal down-conversion stages.

Availability and Pricing

Product Availability Price

AD9739A FMC board with 14-bit D/A converter

Now

$349

AD9467 FMC board with 16-bit A/D converter

March 2012

Contact Digilent Inc.

About Analog Devices

Innovation, performance, and excellence are the cultural pillars on which Analog Devices has built one of the longest standing, highest growth companies within the technology sector. Acknowledged industry-wide as the world leader in data-conversion and signal-conditioning technologies, Analog Devices serves over 60,000 customers, representing virtually all types of electronic equipment. Analog Devices is headquartered in Norwood, Massachusetts, with design and manufacturing facilities throughout the world. Analog Devices’ common stock is listed on the New York Stock Exchange under the ticker “ADI” and is included in the S&P 500 Index. www.analog.com

This PICMG AMC.0 R2.0 compliant AMC offers a unique combination of features that makes it ideal for telecommunications, defense, and networking applications:

Xilinx Virtex-6 FPGA provides high-performance processing resources with a wide range of devices including logic-oriented LXT and DSP-oriented SXT.

High-speed backplane communications enabled by two 1Gb Ethernet links and up to four x4 GTX fat pipe interfaces.

IPMI backplane interface directly connects to an on-board Pigeon Point MMC with integrated IPMI v1.5 capability.

A comprehensive suite of software and FPGA IP cores including an integrated Xilinx Microblaze processor core and 1 Gb Ethernet and x4 Gen2 PCIe links. The Microblaze processor core provides a Petalogix Linux OS that is ready to use for application control and management.

For additional information, please visit www.nallatech.com/amc-420

SANTA CLARA, Calif.–MoSys, Inc. (NASDAQ: MOSY):

Who:

MoSys (NASDAQ: MOSY), a provider of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs, is exhibiting at DesignCon 2012 in booth 615. MoSys will demonstrate interoperability between its Bandwidth Engine® IC and the newest 28nm FPGAs from both Altera Corporation and Xilinx, Inc.

What:

DesignCon is renowned as being the premier event for the semiconductor and electronic design engineering community. DesignCon 2012 is no exception. It is the largest meeting of board designers and is the only event to address chip design engineers’ chip/system/package challenges. It is the place for this community to network, identify solutions to immediate design challenges, and meet in person the solution providers for your next project. DesignCon brings together engineers, suppliers, analysts and media from across the globe, including Asia and the Pacific Rim. DesignCon’s exhibit floor offers the semiconductor and electronic design engineering communities a place to showcase their latest technological advancements and product developments.

When:

DesignCon 2012 begins January 30, 2012 and concludes February 2, 2012. The exhibition takes place on January 31 and February 1, 2012.

Where:

5001 Great America Parkway

Santa Clara, CA 95054

About MoSys, Inc.

MoSys, Inc. (NASDAQ: MOSY) is a provider of high-performance networking memory solutions and high-speed, multi-protocol serial interface intellectual property (SerDes IP). MoSys’ leading edge Bandwidth Engine® ICs combine the company’s patented 1T-SRAM® high-density memory with its SerDes IP and are initially targeted at providing breakthroughs in bandwidth and access performance in next generation networking systems. MoSys’ SerDes IP and DDR3 PHYs support a wide range of data rates across a variety of standards, while its 1T-SRAM memory cores provide a combination of high-density, low-power consumption, high-speed and low cost advantages for high-performance applications. MoSys is headquartered in Santa Clara, California. More information is available on MoSys’ website at www.mosys.com.

CARLSBAD, Calif., Jan. 30, 2012 — Altium, developer of next-generation electronics design software and services, announces new devices and updates to the board-level components from Altera’s Stratix® IV FPGA and MAX® V CPLD device families available in its online content delivery ecosystem, AltiumLive. The release coincides with the inclusion of Altera Stratix IV FPGA and MAX V CPLD device support in the latest update for Altium Designer 10, Altium’s unified electronics design system.

Developed in collaboration with Altera, the updated collection of FPGA and CPLD components add to the extensive range of Altera design content already available through AltiumLive. The new components are available through the AltiumLive portal from within Altium Designer, providing designers with access to current, high quality board-level components during the design process.

Altium Designer includes comprehensive software support for the newly updated Altera devices, allowing their full integration into the programmable device design part of the electronics design flow. This provides the unique design conditions for working with a specific programmable device, such as pin configurations and I/O type, live communication protocols, synthesis and PCB pin swapping data, making the Altera devices ready for easy, rapid deployment in Altium Designer projects.

The collaborative relationship between Altera and Altium is another significant step in the expansion of Altium’s partnership program, which aims to forge collaborative relationships with a broad group of electronic component manufacturers and distributors.

The strategic partnerships ultimately allow Altium to deliver quality online content and services directly to Altium Designer users. Along with device manufacturers such as Altera, Altium has also established relationships with parts suppliers and vendors such as Farnell, Digi-Key and Newark. This allows board-level components to include real-time supply-chain information, such as vendor choice, pricing and availability.

“Collaboration between Altium and parts manufacturers helps us produce high-integrity design IP for our customers,” said Rowland Washington, content development manager for Altium. “We are pleased to be working with Altera to develop an ever-increasing range of third party libraries, templates, reference designs and other ready-to-use design content.”

This latest update to the Altera board-level component content available through AltiumLive includes a full update of the Stratix IV high-performance FPGA family and the addition of the MAX V low power CPLD range – Altium Designer 10 now provides design software support for these devices. The update adds to the already substantial collection of Altera programmable devices available from AltiumLive’s board-level component vault, which includes Altera’s broad portfolio of high-end, low-cost and mid-range FPGA families and CPLDs, including Stratix FPGAs, Cyclone® FPGAs, Arria® FPGAs, and MAX CPLDs.

“Working with Altium to deliver online design content will bring high quality Altera component models directly to the desktop of designers using Altium Designer,” said Patrick Dorsey, senior director of component product marketing at Altera Corporation. “This makes it faster and easier for customers to use Altera devices in their designs using up-to-date, quality design resources.”

The new and existing Altera components are available online through AltiumLive’s board-level component vault, one of Altium’s managed component repositories of ready-to-use design elements accessible through the AltiumLive portal. Designers can directly access the components and linked supplier information from within Altium Designer when using a subscription-enabled license, or by browsing to the AltiumLive Content Store via the web. Designers installing the latest update for Altium Designer 10 will have access to complete design-time software support for the new Altera devices.

More information on the board-level components and how they are accessed in Altium Designer is available in AltiumLive and in the related blogs.

Altera components are available from the company’s distributors, sales representatives and sales offices worldwide. For more information, go to www.altera.com

About Altera

Altera® programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera’s FPGA, CPLD and ASIC devices at www.altera.com. Follow Altera via Facebook, RSS and Twitter.

Monks Ferry, Wirral, UK – January 31, 2012. LDRA, the leader in standards compliance, automated software verification, source code analysis and test tools, has extended the LDRA tool suite to support direct integration with Altera’s Embedded Design Suite (EDS) for Nios II soft core processors. In the past, these processors lacked sufficient CPU and memory to be used in automotive, medical, industrial and avionics environments. However, with the advent of the Nios II family, entire chip sets can be replaced with an Altera FPGA, making them ideal for applications that must be certified. LDRA’s integration ensures that standards such as DO-178B/C, MISRA and IEC 61508 can be verified and validated directly when using these soft core processors.

To achieve integration, LDRA takes advantage of Nios II tool chain characteristics. Using the GNU GCC tool chain and Eclipse IDE to program the Nios II, developers can take advantage of soft core processors previously only available on ASICs with custom chip sets. LDRA leverages the host I/O capability of the GCC tool chain to create unit and system tests that transfer data back into the host processor seamlessly. Within the Eclipse environment, tests can be automated to load and execute, saving time during verification.

“Achieving certification is no easy task,” confirmed Ian Hennell, LDRA Operations Director. “The LDRA tool suite features templates tailored to specific industry and programming standards. These are delivered pre-populated with standard requirements, simplifying compliance for developers. LDRA’s verification strengths combined with a cost-reduced platform such as Nios II lower the cost of embedded systems in industries such as automotive, medical, and avionics, where such applications are ideal.”

By using the LDRA tool suite, companies gain the validation tools necessary to ensure that a software application produced on a Nios II platform is certifiable. Since FPGA-based soft core processors achieve significant cost savings over custom hard core processors both in actual cost and the reduced amount of board design, the LDRA integration provides increased market opportunities for mission- and safety-critical developers wanting to take advantage of this Altera processor family.

The LDRA tool suite offers independent verification support across the full development lifecycle from certification objectives of standards, such as DO-178B/C, IEC 61508, ISO 26262, and IEC 62304, to requirements, code and target testing. LDRA’s unique ability to provide bidirectional traceability from requirements through model, code and tests allows development teams both to validate programming standards and automate their certification process.

About LDRA

For more than 35 years, LDRA has developed and driven the market for software that automates code analysis and software testing for safety-, mission-, security- and business-critical markets. Working with clients to achieve early error identification and full compliance with industry standards, LDRA traces requirements through static and dynamic analysis to unit testing and verification for a wide variety of hardware and software platforms. Boasting a worldwide presence, LDRA is headquartered in the UK with subsidiaries in the United States and India with an extensive distributor network. For more information on the LDRA tool suite, please visit: www.ldra.com.

Avnet Electronics Marketing, an operating group of Avnet, Inc. (NYSE: AVT), announced today the Xilinx Kintex™-7 FPGA DSP Development Kit with High-Speed Analog, supporting Xilinx’s 7 series Targeted Design Platforms. As the demand for faster processing of wideband analog signals continues to rise, this digital signal processing (DSP) development kit offers engineers a proven platform to test, design and deliver a wide range of DSP enabled end products. The cost of this kit is $3,995. Order entry is open now and shipments will begin in mid-March. For more details visit the Xilinx Kintex-7 FPGA DSP Development Kit information page.

Click to Tweet: Just Announced: avnet.me/00568 The @XilinxInc Kintex-7 FPGA DSP Development Kit with High-Speed Analog from Avnet

Designed in collaboration with Xilinx, Inc., the Xilinx Kintex™-7 FPGA DSP Development Kit is comprised of two critical elements. The first is the Xilinx Kintex-7 FPGA KC705 base board. The KC705 features high-performance, serial connectivity and advanced memory interfacing, with the flexibility of the 28nm Kintex-7 field programmable gate array (FPGA) that delivers maximum power efficiency and up to 1200 GMACs of DSP processing bandwidth. The second component of the Xilinx Kintex™-7 FPGA DSP Development Kit is the 4DSP FMC 150, an integrated high-speed FPGA Mezzanine Card (FMC) that interfaces with signals from the outside world. Featuring dual-channel 800 MSPS 16-bit digital-to-analog converters (DACs) and dual-channel 250 MSPS 14-bit analog-to-digital converters (ADCs) from Texas Instruments (TI), the high-speed analog module delivers exceptional throughput when combined with the massively parallel processing bandwidth of the DSP48E1 arithmetic processing engines in the Kintex™-7 FPGA.

Together, these components create a development kit that combines the performance of Xilinx’s 7 series FPGA with the high-speed data conversion of the FMC 150, enabling designers to focus on their application at the beginning of the design process. DSP designers will benefit from intuitive MathWorks tools for system modeling, simulation and auto-code generation. Target applications include wireless communications infrastructure, aerospace and defense, test and measurement, and medical imaging.

Included in the Kintex™-7 FPGA DSP Development Kit:

• Xilinx Kintex™-7 KC705 base board with Kintex™-7 FPGA 

• 4DSP FMC 150 High-Speed ADC/DAC FMC 

• 12V power supply 

• Xilinx ISE® Design Suite: System Edition 

• Targeted Reference Designs include RTL and MathWorks model-based design tool flows 

“This latest DSP development kit from Avnet and Xilinx enables experienced and new developers to FPGAs to quickly focus on the heart of their design that leverages signal processing capabilities of Kintex-7 FPGAs,” said Tom Hill, senior manager DSP Platforms at Xilinx. “Because Kintex-7 devices deliver 2x price-performance improvement with 50 percent less power consumption than previous generation devices, developers can achieve massive levels of DSP performance with significantly lower power and cost.”

“In the time-to-market race, every second counts,” said Jim Beneke, vice president, global technical marketing, Avnet Electronics Marketing. “Avnet’s technical team understands these pressures and has worked with Xilinx to create several design tutorials and application examples for the kit that shrink development time and allow our customers to focus entirely on innovation and design – moving technology from design to market faster.”

View the Xilinx Kintex-7 FPGA DSP Development Kit Firsthand at DesignCon 2012

The Xilinx Kintex™-7 FPGA DSP Development Kit with High-Speed Analog is on display at the 2012 DesignCon event in San Jose, California, in the Xilinx, Inc. booth #732.

The Xilinx Virtex-7 VC707 Evaluation Kit

Xilinx has announced availability of the first design kits and Targeted Design Platform (TDP) for the company’s latest 28nm Kintex-7 and Virtex-7 FPGAs.  The kits were developed through a close partnership between Xilinx and their Alliance Members – 4DSP Inc., Analog Devices Inc., Avnet Electronics Marketing, Northwest Logic, MathWorks, Texas Instruments, and Xylon.

According to Mark Moran, Senior Marketing Manager at Xilinx, the kits that the company is announcing at the 2012 DesignCon  are just the first of 40 that will be developed by the company and its partners.

The first three Xilinx Series 7 kits are:

• The Kintex-7 FPGA KC705 Evaluation Kit for designing higher-level systems that employ DDR3, Gigabit Ethernet, PCI Express, and other serial connectivity standards. Communications features include high-speed GTX transceivers, with enhanced small form-factor pluggable (SFP+) and SubMiniature version A (SMA) connectors.
  • Price and availability: $1,695 order entry open now.

• The Kintex-7 FPGA DSP Kit co-developed with Avnet Electronics Marketing features the Kintex-7 FPGA KC705 board and includes an integrated high-speed analog FPGA Mezzanine Card (FMC) to interface to real-world signals. The DSP Kit includes dual-channel 800 MSPS 16-bit digital-to-analog converters (DACs) and dual-channel 250 MSPS 14-bit analog-to-digital converters (ADCs), which designers can combine with the DSP48E1 arithmetic processing engines in the Kintex-7 FPGA. Data paths to and from the DSP slices can be created and integrated into systems using industry-standard AXI4 interface conventions.
  • Price and availability: $3,995 order entry now from Avnet.

• The Virtex-7 FPGA VC707 Evaluation Kit gives designers of advanced systems with high performance and high bandwidth connectivity requirements a starting point for evaluating Virtex-7 FPGAs, which require 50 percent less power than previous generation devices.
  • Price and availability: $3,495 with order entry open late-February 2012.

To enable the addition of peripherals to the base Xilinx development boards, each kit supports the VITA 57 FMC specification for the industry standard daughter card form factor, connector and modular interface to the FPGA.  The Xilinx Agile Mixed Signal (AMS) header is provided with all 7-Series kits, along with board design files, and a full seat of the Xilinx ISE Design Suite Logic Edition, locked to the on-board FPGA.

The Kintex-7 KC705 kit comes with a set of reference designs on a USB Flash Drive; a built-in self test (BIST) board diagnostic test design, Integrated Bit Error Ratio Tester (IBERT) transceiver (XCVR), Multi-Boot reference design, DDR3 memory interface, PCIe x4 Gen2 PIO, AMS reference design, and a PCIe/DDR3 targeted reference design supporting x4 Gen 2 and DDR3 at 1600Mbps.

To assist in developing applications with the Kintex-7 DSP Kit, Xilinx includes a copy of MathWorks evaluation software for MATLAB and Simulink. A reference DSP design is downloadable from Avnet.

With the Virtex-7 Evaluaiton Kit, Xilinx is also providing a set of reference designs for PCI Express x8 Gen2 design, DDR3 Memory Interface, Gigabit and 10Gigabit Ethernet, BIST board diagnostics, and the IBERT XCVR test design.

TEWS TECHNOLOGIES today announced the TAMC651, a standard single Mid-Size or Full-Size AMC.1 module conforming to MTCA.4 (Micro TCA Enhancements for Rear I/O and Precision Timing) with a user-programmable XC6SLX45T-2 or XC6SLX100T-2 Spartan-6 FPGA. Designed for industrial, COTS, and transportation applications, where specialized I/O or long-term availability is required, the TAMC651 provides a number of advantages including a customizable interface for unique applications and a FPGA-based design to extend product lifecycle.

The Spartan-6’s integrated PCIe Endpoint Block is connected to AMC port 4. AMC ports 12-15 (point-to-point) and AMC ports 17-20 (multi-drop) connect to FPGA I/O pins via on-board M-LVDS transceivers.

One of the Spartan-6 GTP transceiver utilizes an SFP interface available at the front plate. SFP support signals are available as FPGA I/O pins. Four FPGA controlled LEDs are also available at the front plate.

According to MTCA.4, the TAMC651 provides two 30-pair ADF connectors at the Zone 3 interface (Rear I/O).

The following I/O signals are available at the Zone 3 interface: 46 differential FPGA I/O lines (LVDS), 2 differential reference clock lines (LVDS), 2 Spartan-6 GTP transceivers. The differential FPGA I/O lines could also be used as single-ended I/O lines (FPGA bank supply for the Zone 3 I/O signals is 2.5V).

The TAMC651 provides a 128 Mbyte, 16 bit wide DDR3 SDRAM bank. The SDRAM-interface uses one of the internal hardwired Memory Controller Blocks of the Spartan-6 FPGA.

The FPGA is configured by a platform Flash. The Flash device is programmable via JTAG header. The JTAG header also supports readback and real-time debugging of the FPGA design (using Xilinx ChipScope).

A programmable clock generator supplies differential clock lines to FPGA global clock pins, to an on-board clock crosspoint-switch and to the Spartan-6 GTP transceiver used for the SFP interface. The clock generator is programmable by the FPGA design.

The TAMC651 also provides a configurable clock crosspoint-switch. Clock inputs are: programmable clock generator output, FPGA clock output, AMC TCLKA and TCLKB. Two clock outputs are connected to FPGA global clock pins and two clock outputs are available as reference clocks at the Zone 3 interface.

User applications can be developed using the design software ISE WebPACK from Xilinx.

The Engineering Documentation TAMC640-ED for FPGA programming includes all information needed for customer specific FPGA programming with additional Constraints Files. The FPGA Development kit TAMC640-FDK includes a basic example design which includes .ucf-files and well documented VHDL example applications. In addition, TEWS offers extensive software driver support for major operating systems such as Windows, LynxOS, Linux, Integrity, VxWorks, and QNX.

About TEWS TECHNOLOGIES

TEWS TECHNOLOGIES is a leading solutions provider of embedded I/O and CPU products based on open architecture standards such as PMC, XMC, IndustryPack® (IP), CompactPCI, standard PCI, AMC, FMC, and VME. TEWS has more than 30 years of experience designing and building turn-key embedded interface solutions using the philosophy to listen and respond to our customers’ needs. Using this ‘customer first’ approach, TEWS has developed a large number of standard and custom products for industrial control, telecommunication infrastructure, medical equipment, traffic control and COTS applications. TEWS’ line of embedded I/O solutions is available worldwide through a global network of distributors. For more information, go to www.tews.com.

Pentek, Inc., today introduced the first member of its high-performance Onyx™ family – the Model 71760. The 4-channel, 200 MHz A/D XMC module is based on the Xilinx Virtex-7 FPGA family. Pentek’s Onyx modules use the same modular I/O interfaces as the popular Virtex-6 FPGA Cobalt® family, while boosting memory, logic and I/O performance. The Onyx Model 71760, for instance, is similar to the Cobalt 71660, but has twice the memory capacity and I/O bandwidth, addressing the most challenging unmanned aerial vehicle (UAV), radar and communication applications.

“Onyx is a strategic extension of our successful Cobalt line,” said Rodger Hosking, vice president of Pentek. “With higher-speed A/Ds and D/As, and tougher DSP algorithms, we needed more horsepower to keep pace. Pentek leveraged the modular architecture of the Cobalt family, along with the latest Xilinx FPGA technology, to provide customers a broader range of price and performance options and a future path for the most demanding signal processing applications.” Hosking added that Pentek intends to release at least twelve additional Onyx family modules during 2012.

“Pentek is among the first customers to leverage the high-performance, low-power Virtex-7 FPGA family,” said Brent Przybus, director of High-End FPGA platforms at Xilinx. “As with all our 28nm 7 Series FPGA families, our goal is to deliver a scalable, unified FPGA offering with optimized features to increase the performance and flexibility customers need at the lowest possible power consumption.”

Boosting Performance, Retaining Architecture

As the first in the Onyx product line, the Model 71760 exemplifies the relationship of the Onyx and Cobalt families. The Onyx Model 71760 shares many of the same architectural and front-end characteristics as the similar Cobalt Model 71660 module: a four-channel, 16-bit, 200 MHz A/D, external sample clock synchronization and a VITA 42.0 XMC-compatible switched fabric interface.

The similarity of the two families gives developers the opportunity to port software developed for Cobalt modules to the corresponding Onyx modules with a minimum of effort. All ReadyFlow tools work with both families, further simplifying the software development effort. Thus, developers will be able to migrate from Cobalt to Onyx modules as their performance needs increase, or begin development on Cobalt modules until release of the corresponding Onyx module.

Architectural enhancements in the Onyx family include a doubling of the DDR3 memory in both size and speed to 4 GB and 1600 MHz, respectively. The PCIe interface has been upgraded to Gen 3, delivering peak speeds up to 8 GB/sec. The 71760 FPGA comes preconfigured with a suite of built-in functions for data capture, synchronization, tagging and formatting, making the board an ideal turn-key interface for radar, communications or general data acquisition applications. For systems that require custom functions, IP can be developed using the Xilinx ISE Design Software and the Pentek GateFlow FPGA Design Kit, extending or even replacing the factory installed functions. The Onyx architecture now includes enhanced FPGA loading modes to simplify live reconfiguration.

Pricing and Availability

For the latest pricing and availability information, please contact Mario Schiavone by phone at (201) 818-5900 ext.229, or by email at mario@pentek.com.

About Pentek

Pentek develops, manufactures and markets innovative DSP systems and recorders to original equipment manufacturers, distributors and value-added resellers. Pentek offers powerful VME, VPX, VXS, PMC, XMC, cPCI, PCI, PCIe and AMC boards for data acquisition, software radio and digital signal processing featuring Texas Instruments C6000 DSPs, Freescale G4 PowerPCs and Xilinx FPGAs. Pentek’s I/O includes A/Ds, D/As, FPGAs, digital up/downconverters and more. Pentek equips all products with high-performance I/O including gigabit serial interfaces and offers strong DSP software support.

Pentek, Cobalt, Onyx, GateFlow and ReadyFlow are trademarks or registered trademarks of Pentek, Inc. Brand or product names are registered trademarks or trademarks of their respective holders.

For access to the release and data sheets, please visit: www.pentek.com/whatsnew/viewrelease.cfm?index=1[...]

North American Sales Contact: Mario Schiavone, Pentek, Inc., One Park Way, Upper Saddle River, NJ 07458-2311; Telephone 201-818-5900, ext. 770; Fax 201-818-5904; Email news@pentek.com; Website www.pentek.com.

International Sales Contacts: Elexo in France at (33) 0141 22 1023, Galleon Embedded Computing in Germany at (49) 89 5908 2101, LVD Systems in Italy at (39) 011 966 1319, RECAB AB in Sweden at (46) 8 6830300, Advanced Embedded Systems in the UK at (44) 0 1202 885 675, Sela Electronic Systems in Israel at (972) 3 6479969,MISH International in Japan at (81) 42-538-7650, Beijing Betaone Sysjob Ltd. in China at (86) 10 82784106 and Acetronix Co. Ltd. in Korea at (82) 24202343, ext. 106, Dynamic C4 Pte. Ltd. In Singapore, Malaysia and Indonesia at (65) 6405 4506. For a list of Pentek representatives and distributors, please visit www.pentek.com/contact/replist.pdf.

LONGMONT, Colorado – December 15, 2011 – Conduant Corporation, the PCI Express experts in long-duration high speed recording and playback systems, today introduced its SNAP12 Optical FPGA input/output board for a wide variety of high-speed optical applications. The Conduant SNAP12 Optical FPGA board features a Xilinx® Virtex 6™ field programmable gate array (FPGA) for connecting ports and devices. Through an 8-lane Gen2 PCI Express interface and SNAP12 optics, the board can achieve performance rates up to 5 Gigabytes (GB) per second for 12 lanes in and 12 out simultaneously. This high transfer rate is suited to optical communications, data capture, as an interface to data recorders/players and stream-through data processing.

The card is user programmable and comes with a number of initial coding examples. Conduant supplies code blocks for supporting the PCI Express interface and memory management (deep RAM).

The core of Conduant’s SNAP12 Optical FPGA Card is the Virtex-6 FPGA from Xilinx. Using the BPI protocol, AES-256 bitstream encryption is supported which protects the FPGA intellectual property from cloning or reverse engineering. The board supports migration to larger, pin-compatible Virtex-6 components as special order items.

Other features of the SNAP12 Optical FPGA Card include 8 GB of high-speed DDR3 SDRAM (synchronous dynamic random access memory) for data caching, FIFOs and rapid data transfer rates.

Each lane of fiber – transmitter or receiver – operates independently so the user can configure the optics as required by the application. The user can develop select optical protocols such as Serial FPDP, Serial Lite II, Aurora, etc.

“Conduant built a high degree of flexibility into the SNAP 12 Optical FPGA card as we do with all of our products,” said Ken Owens, Conduant founder and CEO. “We design our hardware platforms so that users can easily configure protocols and components based on their specific requirements. As experts in PCI Express, we build in the highest speeds available for maximum performance rates in a wide array of applications. Our optical products are just one example of meeting the increasing demands of our customers.”

Additional features of the SNAP12 Optical FPGA Card:

SNAP12 optical transmitters and receivers up to 3.3 Gb/s per channel, 850 nm, (5.0 Gb/s optional)

Xilinx eFUSE or battery-backed 256-bit AES bitstream encryption

20 Green and 8 red user programmable LEDs

16 MB Flash

JTAG interface for programming Flash and debug

Pricing and Availability

Pricing for the SNAP12 Optical FPGA Card starts at $4,990.00 and units are currently available. For specifications and more details click on: Data Sheet

About Conduant

Conduant Corporation (www.conduant.com), founded in 1996, develops the StreamStor®/Big River family of PCI, PCI-Express disk controllers for high-speed recording and playback of digital data. In addition, Conduant builds high performance PCI Express components and subsystems. Solutions are available in Windows and Linux environments and are used in scientific research, military, aerospace and instrumentation applications. Conduant’s products are guaranteed and will sustain data rates up to and beyond 3GB/s. Conduant is located in Longmont, Colorado. For more information, call (303) 485-2721 or visit www.conduant.com

PARIS, ARM European Technical Conference 2011, Dec. 8, 2011 – Xilinx, Inc. (NASDAQ: XLNX) today announced its first Zynq™-7000 Extensible Processing Platform (EPP) shipments to customers, a major milestone in the roll-out of a complete embedded processing platform that for the first time offers developers ASIC levels of performance and power consumption, the flexibility of an FPGA and the programmability of a microprocessor. Customers who have developed systems using the Zynq-7000 EPP emulation platform, early access Xilinx hardware tools and standard software tools supported by the ARM® Connected Community, are now migrating their applications to these first devices and beginning the next stages of their product development.

Xilinx is showcasing the first public demonstration of a Zynq-7000 EPP at the ARM European Technical Conference, where attendees can see the device running a Linux-based application.

“It’s exciting to see early access customers take what they’ve accomplished since we first launched the Extensible Processing Platform program in April 2010 and apply their systems to these first devices,” said Lawrence Getman, Vice President of Processing at Xilinx. “We are able to give them a significant time to market advantage in their development and introduction of new products that require the unrivaled levels of system performance, flexibility and integration offered by this new class of system-on-chip.”

For systems that need to support applications which require high, real-time performance, the Zynq-7000 EPP delivers levels of performance that go beyond what traditional processing solutions can implement. Emulation platforms, hardware development tools, Open Source Linux support and the recently announced Extensible Virtual Platform developed jointly with Cadence Design Systems, Inc. all help to make developing and implementing Zynq-7000 EPP systems possible. A growing list of OS support is adding to an expanding ecosystem offering embedded tool and software development solutions.

“Participating in the Early Access Program gave National Instruments the opportunity to jump start development to make it possible for NI LabVIEW system design software to program both the high performance processor and programmable fabric present in the Zynq-7000 EPP with a single development environment,” said Jamie Smith, Director of Embedded Systems Product Marketing at National Instruments. “Now that we’ve received the silicon, we’ll continue our development toward providing control and monitoring systems to our customers leveraging the increased capabilities of the Zynq-7000 devices.”

The Zynq-7000 family combines an industry-standard ARM dual-core Cortex™-A9 MPCore™ processing system with Xilinx’s scalable 28nm programmable logic architecture. It supports parallel development of software for the dual-core Cortex-A9 processor-based system and custom accelerators and peripherals in the programmable logic. Software developers can leverage the open source Eclipse platform, Xilinx Platform Studio Software Development Kit (SDK), ARM Development Studio 5 (DS-5) and ARM RealView Development Suite (RVDS), or compilers, debuggers, and applications from leading vendors within the ARM Connected Community and Xilinx Alliance Program ecosystems. Customers can go to vendors such as Enea Services Linköping AB, Express Logic, Inc., Lauterbach Datentechnik GmbH, The MathWorks, PetaLogix, Mentor Graphics Corp., Micrium, and Wind River Systems for their development solutions.

“When we looked at the possibility of leveraging our processor based development investments across different product lines, the Zynq-7000 Extensible Processing Platform’s combination of processor and programmable logic became a clear choice for several of our applications,” said Bernd Liebetrau, Head of CoC Digital Integration at Rohde & Schwarz. “The platform approach allows us to customize each device to meet our various application needs while at the same time enabling us to leverage the software developments over multiple products. Rohde & Schwarz has always been at the forefront of technology and being an early adopter and receiving early samples of the Zynq-7000 EPP is a significant milestone for us.”

Developers can tailor the Zynq-7000 family’s programmable logic to maximize system level performance and efficiently address application specific requirements. Xilinx’s award-winning ISE® Design Suite provides a comprehensive hardware development environment that includes development tools and AMBA® 4 Advanced Extensible Interface (AXI) bus protocol-compliant Plug-and-Play intellectual property (IP) cores as well as Bus Functional Models (BFM) to accelerate design and verification.

“We’ve been heavily focused on the development of our Zynq-7000 EPP products and IP over the past several months,” says Michael Fawcett, CTO of iVeia, “So, naturally, we were very excited to receive our first Zynq-7020 devices. Our Atlas-I-Z7e will be the first computer-on-module to host a Zynq device and will drop into existing sockets for Android handheld, digital radio, and video processing applications. We fully expect to be able to demonstrate such applications within a few months, a credit to Xilinx’s early access support, tools, and emulation platform.”

Addressing Evolving Market Needs

To meet new customer requirements in high-end applications targeting Wired, Wireless and Video Broadcast markets, Xilinx is also announcing the replacement of the Zynq-7040 device with the new Zynq-7045 device to extend the family’s range of twelve, 12.5 Gbps transceiver technology to sixteen. This will enable further bridging applications and wider connections to high speed DAC/ADCs. The increased programmable logic capacity (DSP, BRAM and Logic) will offer designers greater signal processing capability for functions such as filtering, digital conversions, and more, as well as greater opportunities for customizing specific functions. The Zynq-7045 device becomes the new high end of the Zynq-7000 family that spans from 30k logic cells to target the most cost sensitive industrial, automotive and consumer applications, all the way up to 350k logic cells for the applications requiring the highest capacity and performance in a single scalable platform.

o Learn More

Register now for a new TechOnline Webcast on December 13th in which Xilinx technical experts will follow up from their first webcast at the beginning of the year and provide further architectural details and updates about Open Source Linux support and the Extensible Virtual Platform with Cadence. All of this including new detailed documentation and videos can be found at www.xilinx.com/zynq.

Availability

Zynq-7020 EPP initial samples are shipping now to participants of the Early Access program, with production qualified parts on track to begin shipping in the second half of 2012.

About Xilinx

Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com/.

Toronto, Canada – GAO Embedded (www.GAOEmbedded.com) is offering its TI DSP evaluation board which is based on the TMS320F2812 DSP from Texas Instruments. This evaluation board is an ideal tool for research and development, experimentation and for scientific research.

This high-performance TI DSP evaluation board, model 2812EVM I, provides both extended shielded and unshielded interrupt inputs and offers on-board VL-Bus data/address/control lead-out wires and special function pins also with lead-out wires. It has 128 k × 16 bits on-chip flash program memory, 18 k × 16 bits on-chip and 64k × 16 bits extended SRAM, a CAN 2.0 interface and 2 kb serial EEPROM. It also boasts a 10 M Ethernet interface compatible with NE2000 as well as Interface/Driver circuitry for DC motor and Servomotor control.

The evaluation board is immune to electro-magnetic interference (EMI) from the computing unit by using an independent power supply for A/D sampling. The module has a 32-bit fixed-point Flash DSP operating at a frequency of 150 MHz. Source code for testing CCS, PWM, ADC, SPI, SCI, CAN communication, FFT, FC brush/brushless motors and AC motors SPWM and SVOWM is provided. In addition, this optimized module with driver and control systems has eight LED indicators which give status feedback and has two RS232 interfaces for data exchange.

This TI DSP evaluation board belongs to GAO’s family of Embedded Development Tools. Some featured products in this line includes XDS510PP JTAG Scan Path TI DSP Emulator Pod which is commonly used for debugging hardware , debugging software, and flash programming, 2812EVM-II Evaluation Board specially optimized for motor driving and control systems, and XDS510 USB 2.0 Enhanced TI DSP Emulator featuring a compact size, plug-and-play operation, a high operating speed and multi-DSP emulation. This line of products serves the needs of electronic professionals internationally.

For sales inquiries please contact:

1-877 585-9555 ext. 601 – Toll Free (USA & Canada)

1-416 292-0038 ext. 601 – All Other Areas

sales@gaoembedded.com

GAO Embedded (www.GAOEmbedded.com) is a global supplier of embedded development tools and RFID embedded modules. GAO Embedded aims to help customer reduce design and development time and cut costs by providing the most effective solutions.

San Jose, Calif., November 14, 2011—Helping meet the high-quality demands of next-generation video content delivery, Altera Corporation (NASDAQ: ALTR) announced today that Toshiba has selected Altera’s complete portfolio of devices for its VIDEOSneo – the latest generation of flash memory video servers. Toshiba’s VIDEOSneo is a multipurpose video server that deploys flash memories for data storage. It can store video content from multiple sources and in multiple formats for video play out, “real-time direct-to-air.” By leveraging Altera’s MAX® series CPLDs and Cyclone®, Arria®, and Stratix® series FPGAs, Toshiba will benefit from the low cost, low power, high performance, and scalability of Altera’s vast portfolio of devices. This solution will be demonstrated in Toshiba’s booth in Hall 5-5625 at the International Broadcast Equipment Exhibition (InterBEE) 2011 at the Makuhari Messe from November 16 to 18.

Altera’s portfolio of devices handles the coder/decoder (CODEC), flash memory interface, and backplane interface in the flash memory video server in Toshiba’s VIDEOSneo. By replacing ASSPs, Altera’s CPLDs and FPGAs are improving the next-generation video server by increasing output channels from 10 to 40, increasing recording capacity and reducing Toshiba’s development time by enabling easy debug solutions.

Altera’s portfolio of programmable solutions helps Toshiba offer multiple I/Os, high availability—which means file base transfers can play out even while they are still being ingested—power consumption reduced by 40% compared to previous models, and low heat dissipation using the latest NAND flash chips. Altera’s family of programmable devices offers greater flexibility with storage scaling from 1TB to 60 TB. Altera’s video-processing performance also supports the latest CODEC formats—MPEG2 Long GOP/ALL-I and H. 264 (ALL-I)—while high quality up- and down-conversions with AFD support provide low latency and audio transparency.

“When it came time to deploy our next-generation of flash-memory video servers, we had to keep in mind the growing need to meet the demand for higher quality video content delivery,” said Kiyotaka Tsuji, chief specialist, broadcast and network design department at Toshiba. “It was clear that ASSPs were no longer the answer when Altera’s FPGAs met our strict requirements. Altera’s MAX series CPLDs, and Cyclone, Arria, and Stratix series FPGAs offered the flexibility, high performance, cost, and time to market we needed above other solutions we evaluated.”

“We are pleased to continue this strong partnership with Toshiba,” said Don Faria, senior vice president of the communications and broadcast business division at Altera. “For years, Altera has been at the forefront of offering video solutions to innovative companies like Toshiba. Altera’s proven technology in CPLDs and FPGAs is rapidly taking over other solutions and in this next generation of the VIDEOSneo video server, our devices have improved the performance and power, proving the obsolescence of ASSPs once again.”

About Altera

Altera® programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera’s FPGA, CPLD and ASIC devices at www.altera.com. Follow Altera via Facebook, RSS and Twitter.

San Jose, Calif., November 29, 2011–Altera Corporation (NASDAQ:ALTR) today announced it has started shipping its 28-nm Arria® V FPGAs. The Arria V devices are the lowest power mid-range FPGAs available on the market today with 10.3125-Gbps transceiver technology. The family’s innovative features allow designers to tailor their low power, high bandwidth, and low cost requirements for next-generation systems in wireless, broadcast, and military markets. The Arria V devices are the second family to ship from the company’s 28-nm product portfolio following the shipment of its Stratix® V family in early 2011, underscoring Altera’s commitment to deliver 28-nm devices optimized to meet the diverse design needs of customers.

The Arria V family is developed on TSMC’s 28-nm Low-Power (28LP) process and offers the lowest total power, lowest static power, and lowest transceiver power of any midrange FPGA family, consuming up to 40% less power compared to previous generation devices. The family also delivers 50% lower static power and 50% lower transceiver power than any FPGA in its class. By leveraging Altera’s proven transceiver leadership with its sixth-generation transceiver IP, the family is optimized to consume 100mW of power at 10.3125-Gbps data rates. A video demonstrating Altera’s Arria V FPGA integrated transceiver technology entitled, Arria V FPGA Sneak Peek: Transceiver Operation at 6.325 Gbps and 10.3125 Gbps, is available at: www.altera.com/b/arria-v-fpga.html

Companies like CommScope, a global leader in infrastructure solutions for communications networks, leverage Altera’s devices to achieve the right balance of high performance and low power necessary for their next-generation 4G wireless networks.

“After thorough evaluation of multiple alternatives, we chose Altera’s Arria V FPGAs for our upcoming remote radio heads and active antenna systems because they provided the high performance and lowest power we needed while providing the best value in a very price sensitive market,” said Carmine Pagano, engineering fellow at CommScope. “The Arria V devices we received will help us deliver 4G wireless infrastructure products with higher bandwidth, greater power-efficiency and more cost effectiveness, enabling our customers to deliver optimal wireless coverage and quality of service while reducing their overall capital and operating expenses.”

“The Arria V architecture, IP and development tools combined with TSMC’s 28LP process enable our customers to achieve an optimized balance of cost, power, and performance,” said Patrick Dorsey, senior director of product marketing at Altera. “Our investment in tailoring the family to meet the unique requirements of wireless, broadband and military applications will ensure customers achieve the best performance per watt for their applications.”

About Arria V FPGAs

Arria V family is optimized for applications such as remote radio units, in-studio mixers, and 10G/40G linecards. The four family variants—the GX, GT, SX and ST—allow engineers to choose the device that meets their exact needs, with densities up to 503K logic elements (LEs), transceivers that operate up to 10.3125 Gbps, and an optional embedded dual-core ARM® CortexTM -A9 MPCoreTM processor.

Altera’s 28-nm Device Portfolio – Tailored for Specific Design Needs

Altera’s 28-nm FPGA portfolio is the industry’s most comprehensive set of devices tailored to meet the customer’s diverse design requirements. The portfolio provides customers with clearly differentiated solutions across its Arria V, Cyclone® V, and Stratix V FPGA families and its HardCopy® V ASIC family. By investing in process technology, architecture, transceiver technology, and hard intellectual property (IP) blocks, the portfolio enables designers to meet their unique cost, performance, and low power needs with less time and effort. For more information on Altera’s 28-nm product portfolio, visit www.altera.com/28nmportfolio.

Availability

Software support is available now and engineering samples of Altera’s Arria V FPGAs are shipping today. For additional information about the devices, visit www.altera.com/arriav or contact your local Altera sales representative.

About Altera

Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate, and win in their markets. Find out more about Altera’s FPGA, CPLD, and ASIC devices at www.altera.com. Follow Altera via Facebook, RSS, and Twitter.