Multicore
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UltraSoC delivers industry’s first debug and analytics solution for ARM’s AMBA 5 CHI Issue B coherency architecture
UltraSoC today announced the general availability of full debug and monitoring IP for ARM’s recently announced AMBA 5 Coherent Hub Interface (CHI) Issue B.
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UltraSoC and Lauterbach deliver universal SoC debug environment
Integration enables vendor-independent debug within industry standard toolchain
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UltraSoC and Cadence’s Tensilica Division collaborate to deliver universal debug for heterogeneous multicore SoCs
UltraSoC and Cadence Design Systems, Inc. (NASDAQ:CDNS) today announced that they have collaborated to provide support for the Cadence(r) Tensilica(r) Xtensa(r) family of processors within UltraSoC’s UltraDebug(r) universal SoC debug solution.
