PARIS, May 21, 2012 — 6WIND, the gold standard for software-defined networks, today announced that it has joined SDNCentral, the independent community for network virtualization and software-defined networking. As the #1 commercial supplier of high-performance data plane software for SDN-based applications, 6WIND provides solutions that perfectly complement the products from other SDNCentral member companies, enabling the development of both physical and virtual networking appliances with industry-leading cost/performance.

The 6WINDGate Cloud Edition software includes an integrated suite of optimized networking protocols matched to the specific data plane requirements of network appliances. These include protocol termination, QoS, routing, switching, security, tunneling and VPN functions. With existing support for the protocols used by cloud networking orchestrators and upcoming support for cloud management software, developers can quickly integrate 6WINDGate into their SDN solutions with no changes required to their application or control plane software. 6WINDGate also provides full support for industry-standard hypervisors, maximizing the performance of virtual networking appliances such as Application Delivery Controllers (ADCs), firewalls, Intrusion Prevention Systems (IPSs) and software switches.

“6WIND is delighted to become a member of the SDN Central community,” said Eric Carmès, CEO of 6WIND. “SDNCentral’s focus on network virtualization and software-defined networking is precisely aligned with the applications for which we designed the 6WINDGate Cloud Edition product. We look forward to working with other member companies to deploy our high-performance data plane solution along with their hardware, software and system-level products.”

“We are pleased to welcome 6WIND to the vibrant SDNCentral community,” said Roy Chua, co-founder of SDNCentral. “We believe network virtualization and SDN initiatives are critical to enabling business agility and visibility. 6WIND provides a rich platform for building virtualized network solutions and is a great addition to the SDN ecosystem.“

About 6WIND

6WIND, the gold standard for software-defined networks, transforms mobile and cloud infrastructure by providing scalable, high-performance, low-latency networking software optimized for cost-effective hardware based on multicore processors, while enabling Network-as-a-Service capabilities that monetize network services such as bandwidth, QoS and security. The company’s 6WINDGate™ software delivers sustainable competitive advantages to network operators, service providers, system integrators and network equipment providers. 6WIND is a privately owned company based near Paris, France with offices in Mountain View, California, Seoul, South Korea and Beijing, China. For more information, visit http://www.6wind.com.

About SDN Central

SDNCentral is an independent community for network virtualization and software-defined networking (SDN). With over 7,000 members, SDNCentral is also one of the largest communities in the SDN space. SDNCentral’s mission is to connect people, share information, and provide education and training for everyone interested in next generation networking. SDNCentral does this by offering services that expand the SDN community and accelerate SDN adoption including: events and webinars, live and online training, consulting, news aggregation, jobs exchange and referral services for connecting users and technology providers. SDNCentral is located on the web at www.sdncentral.com and on Twitter at @sdn_news and @sdn_tech. For media inquiries, contact info@sdncentral.com .

The DiSTI Corporation, a leading developer of interactive 3D software and customized training solutions, has created the Virtual Tour Guide (VTG) application to provide an enhanced paperless experience for visitors of ITEC 2012. This free iOS app, available on the Apple App Store, provides show attendees with a method of organizing their time at ITEC through an interactive show floor map, a full list of Exhibitors, and the ability to set reminders for program events. To download the app, visit www.disti.com and click on the banner that will take you to the Apple App Store.

"Through attending and exhibiting at numerous tradeshows, we've realized how challenging it can be to stay organized and on track with everything that goes on in just a few days. The goal of this app is to make it easier for attendees to plan, manage, and navigate all that there is to do at ITEC so they can maximize their experience. We hope to expand the use of the guide for future conferences and trade shows," said President of DiSTI Joe Swinski.

Held at ExCeL, London on May 22 - 24, ITEC 2012 will provide an ideal platform to demonstrate the important role that the industry plays in defense against modern challenges. ITEC presents a relevant overview of the key issues and brings solutions to the forefront. In Booth H120 alongside European distribution partner Antyicp Simulation, DiSTI will showcase its latest technologies including Replic8's groundbreaking 3D interactive content creation, GL Studio's high performance displays and instrumentation, and virtual maintenance training capabilities.

The VTG app is compatible with the iPhone and the iPad. For more information on ITEC 2012, visit www.itec.co.uk/. For more information about DiSTI, visit www.disti.com.

About DiSTI

DiSTI is a global leader in the development of Human Machine Interface software for businesses, governments and the military. The company's flagship product, GL Studio, enables programmers and developers to build high-fidelity graphics, 3D simulations and fully interactive controls into their models, enhancing the level of realism and sophistication, while improving learning and retention.

More than 500 customers worldwide, including BAE, Boeing, Dassault, FedEx, Lockheed Martin, Honeywell, Raytheon and Thales, use DiSTI solutions to build maintenance trainers, create PC and Internet-based courseware and to develop components for safety-critical applications. As a full service provider, DiSTI offers a complement of customer programming and development services, and is the recognized leader in training solutions for the global simulation and training community. For more information, visit www.disti.com.

SAN JOSE, CA-- AT 49th DAC BOOTH #1926 -- EVE, the leader in hardware/software co-verification, today announced immediate availability of a 10-Gigabit Ethernet (10GbE) validation platform for its ZeBu (Zero Bugs) family of system-on-chip (SoC) hardware-assisted verification platforms.

The e-zTest 10GbE software is a transaction-based environment for high-speed validation of 10GbE functions in network routers, switches and controllers, and SoC application specific integrated circuits (ASICs) containing 10GbE ports.

"We continue to maintain our leadership position by supplying the broadest range of accelerated virtual verification environments," affirms Luc Burgun, EVE's chief executive officer and president, who adds that more than 30 virtual debug environments are available for ZeBu. "These application-specific debug solutions offer design teams the ability to lead their markets with working silicon faster than their competition."

(EVE also announced today a variety of new software to expand the capabilities of ZeBu, including power-aware verification, post-run debugging, two vertical application validation platforms, low-power and Flash memory models, and ESL tool interfaces. See news release titled, "EVE Adds New Applications for Leading SoC Emulation Platform Environment," for details.)

e-zTest 10GbE supports half- and full-duplex modes, variable frame lengths and inter-frame gap modeling. Application programming interfaces allow easy integration with user testbenches as well as commercial Ethernet test generation and protocol analysis applications. The e-zTest 10GbE frame monitoring and capture environment allows exporting frames in Packet Capture (PCAP) format, and is compatible with the open source Wireshark toolkit for network packet analysis. PCAP files also support Ethernet frame generators such as packETH and Tcpreplay to stimulate the design under test (DUT) deterministically using captured network traffic.

EVE provides accelerated SoC transaction-based verification for hardware and software developers who access ZeBu as a network resource to leading semiconductor, communications, video, and portable and stationary consumer product companies. ZeBu provides a library of off-the-shelf, synthesizable emulation virtual components to debug GbE, 10GbE, PCIe, USB, video/HDMI, I2C, I2S and AMBA protocols and integration with virtual platform development environments for pre-silicon software development. EVE's ZEMI-3 product generates custom, synthesizable transactors for user custom protocols.

Typical projects achieve verification speeds that range from five-to-15 MegaHertz with ZeBu-Blade2 and ZeBu-Server. With Smart Debug, ZeBu provides 100% accessibility into the device under test and a hierarchical debug methodology to trace problems.

EVE will offer demonstrations of the ZeBu SoC hardware-assisted verification platform family in Booth #1926 at the 49th Design Automation Conference (DAC) June 4-6 at the Moscone Center in San Francisco.

About EVE

EVE is the worldwide leader in hardware/software co-verification solutions, offering fast transaction-based co-emulation and in-circuit emulation, with installations at five of the top six semiconductor companies. EVE products shorten the overall verification cycle of complex integrated circuits and electronic systems designs, and can be integrated with transaction-level ESL tools and software debuggers, target hardware systems, as well as Verilog, SystemVerilog and VHDL simulators. EVE is a member of OCP-IP, the MIPI Alliance and Si2, along with ARM, Mentor Graphics, Real Intent, Springsoft and Synopsys Partner programs. Its United States headquarters is located in San Jose, Calif. Corporate headquarters is in Wissous, France. Other offices are located in India, Japan, Korea, Taiwan and Tunisia. Visit EVE online at: www.eve-team.com.

Carbon Design Systems® Inc., the leading supplier of virtual platform and secure model solutions, today introduced the Carbon Performance Analysis Kit (CPAK) family for accelerating the analysis, optimization and verification of system-on-chip (SoC) performance.

CPAKs enable architects and engineers to begin analyzing performance and power within hours of installation, and months before tapeout, reducing overall time-to-market pressures and minimizing the risk of a complete re-design. They can be customized using models from Carbon's IP Exchange model portal, SystemC or Carbon Model Studio.

The CPAK family for ARM® Cortex™ A-Series processors contains reference hardware and software designs along with analysis and debug software for the Cortex-A9, Cortex-A15 and Cortex-A7 cores, and the ARM big.LITTLE™ subsystem.

It comes pre-configured with bare-metal initialization software, Linux or Android OS for analyzing, optimizing and verifying performance and power. In addition, the CPAK Family is pre-configured with the multicore task migration software layer between the big.LITTLE processing cluster, which includes ARM Cortex-A15 MPCore and Cortex-A7 MPCore processors, and the client OS.

"Designers often attempt to use 85-90% cycle-accurate solutions that they claim are good enough for system analysis," comments Joe Tatham, Carbon's vice president of engineering. "What typically happens, though, is that model is only 50-60% accurate for certain areas. Designers are making multi-million dollar decisions based upon data that's about as accurate as the flip of a coin. Carbon is the only vendor that offers 100% cycle-accurate models, where design teams can guarantee performance results will match the final silicon, minimizing the risk of a re-design."

Demonstrations During DAC

Carbon will demonstrate the CPAK for ARM big.LITTLE at this year's Design Automation Conference (DAC) in San Francisco's Moscone Center June 4-6. Carbon will exhibit and offer presentations in the ARM Connected Community Pavilion, Booth #802.

Availability

The CPAK Family for ARM Cortex Processors will be available in bare metal and Linux configurations in the second quarter of calendar year 2012, and in Android configurations in the second half of calendar 2012.

Details about Carbon's Performance Analysis Kit Family, including compatibility with ARM tools and popular software debuggers, can be found at: www.carbondesignsystems.com/cpak.

About Carbon Design Systems

Carbon offers the industry's only unified virtual prototype solution along with the leading solution for accurate IP model creation. Carbon virtual prototypes can execute at 100s of MIPS and with 100% accuracy to enable application software development, detailed architectural analysis and secure IP model distribution. Its solutions are based on open industry standards, including SystemC, IP-XACT, Verilog, VHDL, OSCI TLM, MDI, CASI, CADI and CAPI. Carbon's customers are systems, semiconductor, and IP companies that focus on wireless, networking, and consumer electronics. Carbon is headquartered at 125 Nagog Park, Acton, Mass., 01720. Telephone: (978) 264-7300. Facsimile: (978) 264-9990. Email: info@carbondesignsystems.com. Website: www.carbondesignsystems.com.

EVE, the leader in hardware/software co-verification, today announced immediate availability of a 10-Gigabit Ethernet (10GbE) validation platform for its ZeBu (Zero Bugs) family of system-on-chip (SoC) hardware-assisted verification platforms.

The e-zTest 10GbE software is a transaction-based environment for high-speed validation of 10GbE functions in network routers, switches and controllers, and SoC application specific integrated circuits (ASICs) containing 10GbE ports.

"We continue to maintain our leadership position by supplying the broadest range of accelerated virtual verification environments," affirms Luc Burgun, EVE's chief executive officer and president, who adds that more than 30 virtual debug environments are available for ZeBu. "These application-specific debug solutions offer design teams the ability to lead their markets with working silicon faster than their competition."

(EVE also announced today a variety of new software to expand the capabilities of ZeBu, including power-aware verification, post-run debugging, two vertical application validation platforms, low-power and Flash memory models, and ESL tool interfaces. See news release titled, "EVE Adds New Applications for Leading SoC Emulation Platform Environment," for details.)

e-zTest 10GbE supports half- and full-duplex modes, variable frame lengths and inter-frame gap modeling. Application programming interfaces allow easy integration with user testbenches as well as commercial Ethernet test generation and protocol analysis applications. The e-zTest 10GbE frame monitoring and capture environment allows exporting frames in Packet Capture (PCAP) format, and is compatible with the open source Wireshark toolkit for network packet analysis. PCAP files also support Ethernet frame generators such as packETH and Tcpreplay to stimulate the design under test (DUT) deterministically using captured network traffic.

EVE provides accelerated SoC transaction-based verification for hardware and software developers who access ZeBu as a network resource to leading semiconductor, communications, video, and portable and stationary consumer product companies. ZeBu provides a library of off-the-shelf, synthesizable emulation virtual components to debug GbE, 10GbE, PCIe, USB, video/HDMI, I2C, I2S and AMBA protocols and integration with virtual platform development environments for pre-silicon software development. EVE's ZEMI-3 product generates custom, synthesizable transactors for user custom protocols.

Typical projects achieve verification speeds that range from five-to-15 MegaHertz with ZeBu-Blade2 and ZeBu-Server. With Smart Debug, ZeBu provides 100% accessibility into the device under test and a hierarchical debug methodology to trace problems.

EVE will offer demonstrations of the ZeBu SoC hardware-assisted verification platform family in Booth #1926 at the 49th Design Automation Conference (DAC) June 4-6 at the Moscone Center in San Francisco.

About EVE

EVE is the worldwide leader in hardware/software co-verification solutions, offering fast transaction-based co-emulation and in-circuit emulation, with installations at five of the top six semiconductor companies. EVE products shorten the overall verification cycle of complex integrated circuits and electronic systems designs, and can be integrated with transaction-level ESL tools and software debuggers, target hardware systems, as well as Verilog, SystemVerilog and VHDL simulators. EVE is a member of OCP-IP, the MIPI Alliance and Si2, along with ARM, Mentor Graphics, Real Intent, Springsoft and Synopsys Partner programs. Its United States headquarters is located in San Jose, Calif. Corporate headquarters is in Wissous, France. Other offices are located in India, Japan, Korea, Taiwan and Tunisia. Visit EVE online at: www.eve-team.com.

EVE today announced a variety of new software to expand the capabilities of its ZeBu system-on-chip (SoC) emulation platform, including power-aware verification, post-run debugging, two vertical application validation platforms, low-power and Flash memory models, and electronic system level (ESL) tool interfaces.

"Today's emulation platforms have evolved into complex verification environments to address hardware/software integration and embedded software validation of large designs," remarks Luc Burgun, EVE's chief executive officer and president. "ZeBu has evolved as well and is now the industry trendsetter, as well as market leader, meeting EVE's goal to offer the most comprehensive and commercially available hardware/software co-verification solution."

A new power-aware verification package for ZeBu enables functional verification of power switching in low-power designs. Power islands can be turned on/off dynamically to ensure that power switching does not adversely affect a design's functional integrity. The first release shipping now supports the Unified Power Format (UPF) standard.

The ZeBu Smart debug methodology has been enhanced with a new post-run debug capability that provides a deterministic methodology for tracing complex bugs. In a ZeBu emulation run, the entire state of the SoC emulation environment is captured in "frames," including the design configuration, design under test (DUT) register and memory states, and the corresponding input stimulus to the DUT.

Post-run debug is particularly valuable when problems are identified deep in a long test run or when problem scenarios are difficult to re-create. With post-run debug features, once a problem is identified, the designer has a mechanism to quickly debug it. With the collected data, a debug run can be initiated at any point, and the captured stimulus can be applied to re-create a problem scenario, eliminating the need to start from the beginning of a long test sequence.

EVE has also expanded its library of ZeBu vertical application validation platforms, now exceeding 30 transactors, virtual bridges and ICE speed-rate adapters to easily integrate ZeBu-emulated SoC designs with system-level verification and validation environments (See accompanying news releases also issued today titled, "EVE Unveils e-zTest 10-Gigabit Ethernet Validation Platform.")

The e-zTest PCIe Gen 3 validation platform with up to 16 lanes of support, including a PCIe frame Viewer for debug, is now available, as is a new e-zTest 10Gbit Ethernet validation platform. The ZeBu memory model catalog includes the latest low-power and Flash memory models.

Finally, EVE is unveiling new transaction-level interfaces to leading electronic system level (ESL) software. These links enable a high-performance, hybrid virtual development environment where software integrated development environments (IDEs) are used to debug software executing on ESL virtual platforms with the available RTL code being run and debugged at accelerated emulation speeds in ZeBu. For leading-edge designs, which typically include 50% or more RTL reuse, engineers can access the more accurate, hybrid hardware/software co-verification environment early in the project and identify timing-related issues not found in a pure ESL virtual platform.

Pricing is available upon request.

EVE will offer demonstrations of the entire ZeBu hardware-assisted verification family in Booth #1926 at the 49th Design Automation Conference (DAC) June 4- 6 at the Moscone Center in San Francisco.

About EVE

EVE is the worldwide leader in hardware/software co-verification solutions, offering fast transaction-based co-emulation and in-circuit emulation, with installations at five of the top six semiconductor companies. EVE products shorten the overall verification cycle of complex integrated circuits and electronic systems designs, and can be integrated with transaction-level ESL tools and software debuggers, target hardware systems, as well as Verilog, SystemVerilog and VHDL simulators. EVE is a member of OCP-IP, the MIPI Alliance and Si2, along with ARM, Mentor Graphics, Real Intent, Springsoft and Synopsys Partner programs. Its United States headquarters is located in San Jose, Calif. Corporate headquarters is in Wissous, France. Other offices are located in India, Japan, Korea, Taiwan and Tunisia. Visit EVE online at: www.eve-team.com.

FOUNTAIN HILLS, Ariz., May 15, 2012 — OpenSystems Media (OSM), LLC today announced the addition of a new embedded moderator, Jim Turley, internationally known industry leader and editor, effective immediately. He is the former Editor-in-Chief of Embedded Systems Design magazine and Embedded Systems Conference Chair. Turley will be working with OpenSystems Media moderating embedded webcasts and virtual events. Turley will be the Embedded Moderator for Embedded Computing Design magazine.

OSM is one of the largest providers of editor-moderated webcasts in the embedded space. OSM, the leading producer of embedded E-casts in the industry, continues to be successful with their webcasts because they provide the right tools, leading editorial staff, and a robust streaming architecture, which delivers a seamless experience for online attendees.

The first major initiative is OSM’s Fundamentals of Embedded Computing webcasts. Topics will include:

• Choosing a Processor

• Choosing an Operating System

• Tools, Debugging, Support, and Training

• ARM vs. Anyone Else

• Designing a GUI

• MCU Upgrade: Moving up From 8-bit to 16/32-bit

• Ins and Outs of Open Source

“We are very excited to have yet another industry leader/veteran added to our webcasting team. OSM continues to drive the brightest minds with the best topics for our embedded webcasts,” said Christi Long, Director of Online Business, OpenSystems Media. “We are the largest provider of topics covering the embedded marketplace.”

“In the recent months, some publishers have abandoned their coverage of the embedded space. Our hiring of Jim Turley and our newest Embedded App reinforces our print and online commitment,” said Patrick Hopper, Publisher, OpenSystems Media.

“OSM continues to be a driving force and leader in the embedded marketplace. I am excited to be a part of the OpenSystems Media team and I look forward to adding my 25 years of experience to their expanding webcast initiatives,” said Turley.

Turley is an acknowledged authority on microprocessor chips, semiconductor technology, and embedded systems. He is founder and principal analyst at Silicon Insider, a technology consulting firm specializing in microprocessors and embedded software, providing technical and financial/market analysis for microprocessors, semiconductor Intellectual Property (IP), embedded technology, computers, and silicon technology. Turley is the editor of Electronic Engineering Journal and former Editor-in-Chief of the prestigious industry journal Microprocessor Report. He is the author of seven books and is a popular speaker at industry events.

If you are interested in any of the upcoming webcasts or would like Jim Turley to moderate a webcast, please contact Patrick Hopper.

Jim Turley can be reached at jturley@opensystemsmedia.com

Pat Hopper can be reached at phopper@opensystemsmedia.com

Christi Long can be reached at clong@opensystemsmedia.com

About OpenSystems Media

OpenSystems Media has been a leading publisher of electronics magazines, e-mail newsletters, websites, and product resource guides for more than 20 years. OpenSystems Media is also the leader in driving leads and awareness through social media and is the largest producer of lead-generation tools such as webcasts, whitepapers, product directories, Tech E-Briefs, TechChannels, and Techcasts. OpenSystems Media offers E-casts and Techcasts for engineers and provides interactive tools where engineers can communicate directly with presenters and top industry editors. OpenSystems Media also offers the Embedded Computing Design iPhone and iPad app for the embedded industry. Current publications include: Embedded Computing Design; Military Embedded Systems; CompactPCI, AdvancedTCA, & MicroTCA Systems; DSP-FPGA.com; PC/104 and Small Form Factors; and VITA Technologies. For more information, visit www.opensystemsmedia.com.

Ixia agreed to acquire Anue Systems, which offers a network monitoring solutions, for $145 million in cash.

Anue Systems offers a Net Tool Optimizer that provides traffic visibility for Service Providers and enterprises by enabling test tools to access taps across the network. Anue aggregates and filters network traffic to optimize network monitoring tool usage. Anue also can replicate network traffic from a single tap or SPAN port and send it to multiple monitoring tools simultaneously. The company was founded in 2002 and is based in Austin, Texas.

Ixia said the acquisition extends its scope in the realm of real time network monitoring and traffic visibility.

Anue grew revenues 51 percent in 2011 to $40.5 million and generated gross margins of 83 percent for the year. For the 12 months ended March 31, 2012, Anue generated $47.6 million in revenues.

Ixia expects this transaction to be accretive to non-GAAP earnings beginning in the third quarter of 2012. Non-GAAP earnings exclude stock-based compensation, amortization of acquired intangible assets, and other non-recurring charges, net of the applicable tax effects.

“Many networking trends such as the deployment of cloud and virtualization, LTE and mobility driven growth, security implications of applications delivered over cloud infrastructures, and the massive expansion in bandwidth are fueling both Ixia’s and Anue's growth,” said Vic Alston, Ixia chief operating officer. “Next-generation cloud providers, mobility operators and enterprises all require network and traffic visibility to maintain quality of service across application and service delivery. Anue's Optimizer solutions provide customers with a measurable value regarding performance, scale, and resiliency of networks, while enabling the creation of a next generation platform for quality of service delivery across live networks.”

www.ixiacom.com

www.anuesystems.com

07-May-12

Ixia's recent acquisitions include VeriWave (wireless testing), Catapult Communications (3G and 4G network tests), and Agilent's N2X Data Networks Product Line.

Excellicon, a first-time exhibitor of end-to-end Timing Constraints Solution at the Design Automation Conference (DAC), today announced it adopted Verific Design Automation's industry-standard, IEEE-compliant front-end platform for use with its software for timing constraints authoring, verification and management.

Verific's SystemVerilog and VHDL parsers and register transfer level (RTL) elaborator have been tightly integrated with Excellicon's Timing Constraints Compiler. Excellicon's products are targeted at solving complexity associated with latest requirements in timing constraints, including multi-mode constraints generation, verification and management, as well as full mode analysis capabilities. They will be demonstrated during DAC in Booth #610 June 4-6 at the Moscone Center in San Francisco.

"Selecting Verific's front-end software enabled us to focus on our core competency and get our products to market much faster," remarks Peter Petrov, founder and chief executive officer of Excellicon. "Its reputation for quality, reliable software and excellent support is well earned. The Verific team should be commended for its customer support and service."

Excellicon's Constraints Manager ConMan is based on patented formal technology targeted at solving complex problems facing chip designers, from initial planning through final timing closure where implementation expertise is needed. Its tools provide the infrastructure to develop, track, optimize and verify information for the entire design for faster time to tapeout. They also enable designers to seamlessly propagate constraints for any mode in the design to any layer of hierarchy with ease.

Michiel Ligthart, Verific's president and chief operating officer, says: "We take great pride in working with EDA startups such as Excellicon. It is addressing a critical area of the design flow by tackling timing constraints closure with a promising approach and wisely elected to outsource its front-end software needs to us."

Since its founding in 1999, Verific's software has served as the front end to a wide range of EDA and FPGA tools for analysis, simulation, verification, synthesis, emulation and test of register transfer level (RTL) designs. The Verific Parser Platform includes support for SystemVerilog, Verilog, VHDL and UPF. Verific's software is distributed as C++ source code and compiles on all 32- and 64-bit Unix, Linux and Windows operating systems.

Verific will offer demonstrations of its RTL front-end solutions in DAC Booth #1807. Additionally, its software will be demonstrated in 20 other DAC exhibitor booths.

About Excellicon

Founded in 2008, Excellicon is a privately funded EDA company focused on developing software solutions to address timing constraints authoring, verification and management. It offers a unique and new approach to compile and generate constraints correct by construction. Excellicon's patented software is designed for semiconductor professionals from a developer's perspective and covers the spectrum of constraints development, including timing constraints compilation, verification, formal validation and management through a multi-mode approach. It is headquartered in Laguna Hills, Calif. For more information on Excellicon, visit: www.excellicon.com.

About Verific Design Automation

Verific Design Automation, with offices in Alameda, Calif., and Kolkata, India, provides de facto standard front-end solutions supporting SystemVerilog, Verilog and VHDL design. Verific's software is used worldwide by the EDA and semiconductor community in synthesis, simulation, formal verification, emulation, debugging, virtual prototyping, and design-for-test applications, which combined have shipped more than 40,000 copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: info@verific.com. Website: www.verific.com.

Extreme Engineering Solutions (X-ES), embedded computing market leader, today announced that its XPedite7332 has achieved VMware Ready™ status. This designation indicates that the CompactPCI Single Board Computer (SBC) has passed a detailed evaluation and testing process managed by VMware and is now listed on the VMware Solution Exchange (VSX). Product listing location – https://solutionexchange.vmware.com/store/produ[...]

Passing the extensive VMware-specified testing helps ensure that the XPedite7332 SBC makes best use of VMware technology and is ready for deployment in customer environments.

“We are pleased that the XPedite7332 qualifies for the VMware Ready™ logo, signifying to customers that it has passed specific VMware testing and interoperability criteria and is ready to run in production environments,” said Sheryl Sage, Director, Alliance Programs, VMware. “Customers now have more choices with VMware vSphere ™, which has been expanded to cover a broad range of embedded processors, I/O devices, and servers.”

“By using the XPedite7332 with VMware Hypervisor (aka ESXi 5.0 Update 1) enterprises can run multiple mission-specific and advanced networking applications from Cisco, such as Unified Communications Manager (UCM), Virtual Wide Area Application Services (vWAAS), and Security Gateway on a rugged CompactPCI SBC to extend the same enterprise services that Cisco applications provide running on rack-mount servers to rugged, deployed systems in vehicles and aircraft,” said Bret Farnum, VP of Sales and Marketing for X-ES.”

The VMware Ready program is a VMware co-branding program for qualified partner products and is a benefit of the VMware Technology Alliance Partner (TAP) program. With more than 2,000 members worldwide, the VMware TAP program works with best-of-breed technology partners to provide them a comprehensive set of VMware technical and marketing services, support, tools and expertise to deliver enhanced value to joint customers.

Extreme Engineering Solutions XPedite7332 SBC can be found within the online VMware Solutions Exchange at solutionexchange.vmware.com.

About X-ES — Extreme Engineering Solutions, Inc. (X-ES), a 100% U.S.A. based company, designs and builds single-board computers, I/O boards, power supplies, backplanes, chassis, and system-level solutions for embedded computing customers. X-ES offers cutting-edge performance and flexibility in design, plus an unparalleled level of customer support and service. For further information on X-ES products or services, please visit our website at www.xes-inc.com, or call (608) 833-1155.